LM25069MM-2EVAL National Semiconductor, LM25069MM-2EVAL Datasheet - Page 14

• Manufacturer Part Number: LM25069MM-2EVAL
• Description: BOARD EVALUATION LM25069
• Manufacturer: National Semiconductor

Specifications of LM25069MM-2EVAL

• Main Purpose: Power Management, Hot Swap Controller
• Embedded: No
• Utilized Ic / Part: LM25069-2
• Primary Attributes: High Side MOSFET Driver, Inrush Current Limiting
• Secondary Attributes: Auto Restart, 2.9 V ~ 17 V Supply
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

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A) Turn-on with current limit only: The current limit thresh-
old (I
the current limit threshold is less than the current defined by
the power limit threshold at maximum V
at the current limit threshold only during turn-on. Referring to
Figure
source voltage is controlled at V
I
the drain current reduces to its normal operating value. The
time for the OUT pin voltage to transition from zero volts to
V
where C
C
maximum instantaneous power dissipated in the MOSFET is
12W. This calculation assumes the time from t1 to t2 in
10a is small compared to t
current until after the output voltage has reached its final val-
ue, and PGD switches high
current during the turn-on sequence
time is longer than the above calculation, and is approximate-
ly equal to:
where R
must be set longer than t
the turn-on sequence is complete.
LIM
SYS
L
. As the output voltage reaches its final value, (V
= 1000 µF, and I
LIM
is equal to:
FIGURE 8. No Load Current During Turn-On
10a, as the load current reaches I
) is determined by the current sense resistor (R
L
L
is the load capacitance. For example, if V
is the load resistance. The Fault Timeout Period
LIM
ON
= 1A, t
ON
to prevent a fault shutdown before
, and the load does not draw any
(Figure
ON
GSL
calculates to 12 ms. The
to maintain the current at
(Figure
8). If the load draws
DS
the circuit operates
LIM
9), the turn-on
, the gate-to-
SYS
30086722
DS
= 12V,
Figure
≊
S
0V)
). If
14
B) Turn-on with power limit and current limit: The maxi-
mum allowed power dissipation in Q1 (P
the resistor at the PWR pin, and the current sense resistor
R
threshold (I
limit threshold at maximum V
erates initially in the power limit mode when the V
high, and then transitions to current limit mode as the current
increases to I
suming the load (R
for the output voltage to reach its final value is approximately
equal to:
For example, if V
P
current level (I
Period must be set longer than t
FET(LIM)
S
. See the Power Limit Threshold section. If the current limit
FIGURE 9. Load Draws Current During Turn-On
= 10W, t
LIM
) is higher than the current defined by the power
LIM
P
) is approximately 0.83A. The Fault Timeout
and V
SYS
ON
L
) is not connected during turn-on, the time
calculates to
= 12V, C
DS
decreases. See
DS
(P
L
ON
= 1000 µF, I
FET(LIM)/
.
≊
12.2 ms, and the initial
FET(LIM)
V
SYS
Figure
) the circuit op-
LIM
) is defined by
DS
= 1A, and
30086723
10b. As-
of Q1 is