LMX25313010EVAL National Semiconductor, LMX25313010EVAL Datasheet - Page 2

• Manufacturer Part Number: LMX25313010EVAL
• Description: BOARD EVAL FOR LMX25131LQ 3010
• Manufacturer: National Semiconductor
• Series: PowerWise®r

Specifications of LMX25313010EVAL

• Main Purpose: Timing, Frequency Synthesizer
• Embedded: No
• Utilized Ic / Part: LMX2531LQ3010
• Primary Attributes: Low Band 1455 - 1566 MHz, High Band 2910 - 3132 MHz
• Secondary Attributes: 2.8 V ~ 3.2 V Supply
• Silicon Manufacturer: National
• Silicon Core Number: LMX2531
• Kit Application Type: Clock & Timing
• Application Sub Type: Frequency Synthesizer
• Kit Contents: Board, Cable, CD
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Table of Contents
Table of Contents ................................................................................................................ 2
Loop Filter .......................................................................................................................... 3
Quick Setup ......................................................................................................................... 3
Troubleshooting .................................................................................................................. 4
Device Data ......................................................................................................................... 5
CodeLoader Settings ......................................................................................................... 16
Schematic .......................................................................................................................... 22
Bill of Materials ................................................................................................................ 23
Top Layer .......................................................................................................................... 24
Mid Layer 1 "Ground Plane" ............................................................................................ 25
Mid Layer 2 "Power" ........................................................................................................ 26
Bottom Layer "Signal" ...................................................................................................... 27
Top Build Diagram ........................................................................................................... 28
S
P
C
F
P
F
F
F
F
I
I
I
I
S
B
PLL/VCO .................................................................................................................................................. 19
R
P
NTEGER
NTEGER
N
N
OFTWARE DOES NOT COMMUNICATE WITH THE EVALUATION BOARDS
ART RESPONDS TO PROGRAMMING
AR
HASE
REE
REE
RACTIONAL
RACTIONAL
ELECT
ORT
LOSE
ITS
EGISTERS
-
-
BAND
BAND
Inter-modulation Spurs ............................................................................................. 15
-
/P
OUT
-R
-R
S
-
INS
N
ETUP
IN PHASE NOISE IS WORSE THAN EVALUATION BOARD INSTRUCTIONS SHOW
UNNING
UNNING
D
OISE
S
S
F
F
P
EVICE
................................................................................................................................................... 18
PURS
PURS
ACTIONAL
ACTIONAL
HASE NOISE IS WORSE THAN EVALUATION BOARD INSTRUCTIONS SHOW
................................................................................................................................................. 20
............................................................................................................................................... 21
S
S
............................................................................................................................................... 6
PURS
PURS
.......................................................................................................................................... 16
VCO P
VCO P
(I
(I
NTERNAL
NTERNAL
L M X 2 5 3 1 L Q 3 0 1 0 E
(I
(I
S
S
NTERNAL
NTERNAL
PURS
PURS
HASE
HASE
D
D
I
I
N
N
NTEGER
NTEGER
IVIDE BY
IVIDE BY
OISE
OISE
D
D
IVIDE BY
IVIDE BY
,
(I
(I
BUT DOES NOT LOCK TO THE CORRECT FREQUENCY
NTERNAL
NTERNAL
S
S
2 D
2 E
PURS
PURS
NABLED
ISABLED
2 D
2 E
E V A L U A T I O N
(I
(I
NABLED
NTERNAL
NTERNAL
ISABLED
D
D
IVIDE BY
IVIDE BY
) .................................................................................. 12
) ................................................................................. 11
2
) ........................................................................... 10
) ............................................................................ 9
D
D
IVIDE BY
IVIDE BY
2 D
2 E
NABLED
ISABLED
B O A R D
2 D
2 E
....................................................... 4
) ..................................................... 8
) .................................................... 7
NABLED
ISABLED
O P E R A T I N G
) ..................................... 14
) .................................... 13
.................................... 4
.................................... 5
............................ 4
I N S T R U C T I O N S