SERDES03-40USB/NOPB National Semiconductor, SERDES03-40USB/NOPB Datasheet

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... FIGURE 1. General Block Diagram – FPD-Link II 18-bit RGB Display Application The single serial differential signal carries the parallel data (RGB and control) information, clock information and a small amount of serial overhead. Routing of the single signal pair © 2009 National Semiconductor Corporation National Semiconductor Application Note 1807 John Goldie ...

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An example of the 24-bit (user) payload is shown in 2. The 24-bit data field is appended with four additional serial bits which provide the embedded clock information, link cod- ing, and operating mode information. A fixed clock edge is ...

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FIGURE 3. 24-bit RGB FPD-Link II SERDES XGA Display Application In this example, if the PCLK was at 43MHz, the serial trans- mission rate is 28 times the PCLK, or 1.2 Gbps. The user data rate is 24X of PCLK, ...

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NSID (root) Function DS90UR906Q DES DS90UR907Q SER DS90UR908Q DES Check website for latest product introductions. www.national.com Color Depth General (bits per pixel) Purpose I/O 24-bit N/A 24-bit N/A 24-bit N/A 4 Parallel Interface PCLK (MHz) LVCMOS FPD-Link ...

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Summary The FPD-Link II SerDes devices provide an embedded clock single serial stream for Display, Imaging, Pixel based, and other applications. The serial interface greatly eases inter- connect design in terms of space, pins, skew and cost. The FPD-Link II ...

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