CDB5451A Cirrus Logic Inc, CDB5451A Datasheet - Page 6

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CDB5451A

Manufacturer Part Number
CDB5451A
Description
EVAL BOARD CS5451A 6CH ADC
Manufacturer
Cirrus Logic Inc
Datasheets

Specifications of CDB5451A

Number Of Adc's
6
Number Of Bits
6
Data Interface
Serial
Inputs Per Adc
2 Differential
Input Range
1.6 Vpp
Power (typ) @ Conditions
27mW @ 3 V
Voltage Supply Source
Analog and Digital, Dual ±
Operating Temperature
-40°C ~ 85°C
Utilized Ic / Part
CS5451A
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
598-1009
SWITCHING CHARACTERISTICS
Notes:
6
Rise Times
(Note 6)
Fall Times
(Note 6)
Serial Port Timing
Serial Clock Frequency
(Note 7)
Serial Clock
(Note 7 and 8)
SCLK falling to New Data Bit
FSO Falling to SCLK Rising Delay
FSO Pulse Width
SE Rising to Output Enabled
SE Falling to Output in Tri-state
SCLK
SDO
FSO
SE
Min/Max characteristics and specifications are guaranteed over all Operating Conditions.
Typical characteristics and specifications are measured at nominal supply voltages and TA = 25 °C.
VA+ = VD+ = 3 V ±10%; VA- = -2 V ±10%; AGND = DGND = 0 V. All voltages with respect to 0 V.
Logic Levels: Logic 0 = 0 V, Logic 1 = VD+
6. Specified using 10% and 90% points on wave-form of interest. Output loaded with 50 pF.
7. Device parameters are specified with XIN = 4.096 MHz.
8. Device parameters are specified with OWRS = 1.
9. After SE is asserted, the states of SDO and SCLK are FSO is undefined.
t
6
Parameter
Any Digital Input (except XIN)
Any Digital Input (except XIN)
t
5
Figure 1. Serial Port Timing
t
Any Digital Output
Any Digital Output
4
MSB(V1)
Pulse Width High
Pulse Width Low
OWRS = “0”
OWRS = “1”
(Note 7 & 8)
(Note 7 & 8)
t
3
XIN only
XIN only
(Note 9)
MSB(V1) - 1
t
1
t
2
Symbol
SCLK
SCLK
t
t
rise
fall
t
t
t
t
t
t
t
1
2
3
4
5
6
7
Min
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
LSB(I3)
1000
Typ
500
0.5
0.5
0.5
50
50
1
-
-
-
-
-
-
-
Max
CS5451A
1.0
1.0
10
10
50
50
50
t
-
-
-
-
-
-
-
-
7
DS635F3
SCLK
SCLK
SCLK
SCLK
Unit
kHz
kHz
µs
ns
ns
µs
ns
ns
ns
ns
ns

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