ADC14V155HFEB/NOPB National Semiconductor, ADC14V155HFEB/NOPB Datasheet - Page 10

• Manufacturer Part Number: ADC14V155HFEB/NOPB
• Description: BOARD EVAL ADC12V155HF >150MHZ
• Manufacturer: National Semiconductor
• Series: PowerWise®r

Specifications of ADC14V155HFEB/NOPB

• Number Of Adc's: 1
• Number Of Bits: 14
• Sampling Rate (per Second): 155M
• Data Interface: Parallel
• Inputs Per Adc: 1 Differential
• Power (typ) @ Conditions: 951mW @ 155MSPS
• Voltage Supply Source: Analog and Digital
• Operating Temperature: -40°C ~ 85°C
• Utilized Ic / Part: ADC14V155
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: ADC14V155HFEB

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Specification Definitions
APERTURE DELAY is the time after the falling edge of the
clock to when the input signal is acquired or held for conver-
sion.
APERTURE JITTER (APERTURE UNCERTAINTY) is the
variation in aperture delay from sample to sample. Aperture
jitter manifests itself as noise in the output.
CLOCK DUTY CYCLE is the ratio of the time during one cycle
that a repetitive digital waveform is high to the total time of
one period. The specification here refers to the ADC clock
input signal.
COMMON MODE VOLTAGE (V
age applied to both input terminals of the ADC.
CONVERSION LATENCY is the number of clock cycles be-
tween initiation of conversion and when that data is presented
to the output driver stage. Data for any given sample is avail-
able at the output pins the Pipeline Delay plus the Output
Delay after the sample is taken. New data is available at every
clock cycle, but the data lags the conversion by the pipeline
delay.
DIFFERENTIAL NON-LINEARITY (DNL) is the measure of
the maximum deviation from the ideal step size of 1 LSB.
EFFECTIVE NUMBER OF BITS (ENOB, or EFFECTIVE
BITS) is another method of specifying Signal-to-Noise and
Distortion Ratio or SINAD. ENOB is defined as (SINAD -
1.76) / 6.02 and says that the converter is equivalent to a
perfect ADC of this (ENOB) number of bits.
FULL POWER BANDWIDTH is a measure of the frequency
at which the reconstructed output fundamental drops 3 dB
below its low frequency value for a full scale input.
GAIN ERROR is the deviation from the ideal slope of the
transfer function. It can be calculated as:
It can also be expressed as Positive Gain Error and Negative
Gain Error, which are calculated as:
INTEGRAL NON LINEARITY (INL) is a measure of the de-
viation of each individual code from a line drawn from negative
full scale (½ LSB below the first code transition) through pos-
itive full scale (½ LSB above the last code transition). The
deviation of any given code from this straight line is measured
from the center of that code value.
INTERMODULATION DISTORTION (IMD) is the creation of
additional spectral components as a result of two sinusoidal
frequencies being applied to the ADC input at the same time.
It is defined as the ratio of the power in the intermodulation
products to the total power in the original frequencies. IMD is
usually expressed in dBFS.
LSB (LEAST SIGNIFICANT BIT) is the bit that has the small-
est value or weight of all bits. This value is V
“V
lution in bits.
LVDS DIFFERENTIAL OUTPUT VOLTAGE (V
solute value of the differnece between V
each measured with respect to Ground.
LVDS OUTPUT OFFSET VOLTAGE (V
between the DX+ and DX- pins' output voltages; i.e., [V
V
Gain Error = Positive Full Scale Error − Negative Full Scale
DX-
FS
” is the full scale input voltage and “n” is the ADC reso-
]/2.
NGE = Offset Error - Negative Full Scale Error
PGE = Positive Full Scale Error - Offset Error
Error
CM
) is the common DC volt-
DX+
OS
and V
) is the midpoint
OD
FS
DX-
) is the ab-
/2
n
outputs;
, where
Dx+
+
10
MISSING CODES are those output codes that will never ap-
pear at the ADC outputs. The ADC14V155 is guaranteed not
to have any missing codes.
MSB (MOST SIGNIFICANT BIT) is the bit that has the largest
value or weight. Its value is one half of full scale.
NEGATIVE FULL SCALE ERROR is the difference between
the actual first code transition and its ideal value of ½ LSB
above negative full scale.
OFFSET ERROR is the difference between the two input
voltages [(V
code 8191 to 8192.
OUTPUT DELAY is the time delay after the falling edge of the
clock before the data update is presented at the output pins.
PIPELINE DELAY (LATENCY) See CONVERSION LATEN-
CY.
POSITIVE FULL SCALE ERROR is the difference between
the actual last code transition and its ideal value of 1½ LSB
below positive full scale.
POWER SUPPLY REJECTION RATIO (PSRR) is a measure
of how well the ADC rejects a change in the power supply
voltage. PSRR is the ratio of the Full-Scale output of the ADC
with the supply at the minimum DC supply limit to the Full-
Scale output of the ADC with the supply at the maximum DC
supply limit, expressed in dB.
SIGNAL TO NOISE RATIO (SNR) is the ratio, expressed in
dB, of the rms value of the input signal to the rms value of the
sum of all other spectral components below one-half the sam-
pling frequency, not including harmonics or DC.
SIGNAL TO NOISE PLUS DISTORTION (S/N+D or
SINAD) Is the ratio, expressed in dB, of the rms value of the
input signal to the rms value of all of the other spectral com-
ponents below half the clock frequency, including harmonics
but excluding d.c.
SPURIOUS FREE DYNAMIC RANGE (SFDR) is the differ-
ence, expressed in dB, between the rms values of the input
signal and the peak spurious signal, where a spurious signal
is any signal present in the output spectrum that is not present
at the input.
TOTAL HARMONIC DISTORTION (THD) is the ratio, ex-
pressed in dB, of the rms total of the first nine harmonic levels
at the output to the level of the fundamental at the output. THD
is calculated as
where f
quency and f
harmonic frequencies in the output spectrum.
SECOND HARMONIC DISTORTION (2ND HARM) is the dif-
ference expressed in dB, between the RMS power in the input
frequency at the output and the power in its 2nd harmonic
level at the output.
THIRD HARMONIC DISTORTION (3RD HARM) is the dif-
ference, expressed in dB, between the RMS power in the
input frequency at the output and the power in its 3rd harmonic
level at the output.
1
is the RMS power of the fundamental (output) fre-
IN
2
+) – (V
through f
IN
-)] required to cause a transition from
10
are the RMS power of the first 9