DK86065-2 Fujitsu Semiconductor America Inc, DK86065-2 Datasheet - Page 48

KIT EVAL 16BIT DAC FOR MB86065

DK86065-2

Manufacturer Part Number
DK86065-2
Description
KIT EVAL 16BIT DAC FOR MB86065
Manufacturer
Fujitsu Semiconductor America Inc
Datasheets

Specifications of DK86065-2

Number Of Dac's
1
Number Of Bits
14
Outputs And Type
1, Differential
Sampling Rate (per Second)
1G
Data Interface
Serial
Dac Type
Current
Voltage Supply Source
Analog and Digital
Operating Temperature
-40°C ~ 85°C
Utilized Ic / Part
MB86065
For Use With
865-1111 - DAC DK FPGA ADAPTER BOARD865-1012 - KIT DEV DUAL 14BIT MB86064 SMA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
865-1011
6.6
Requests for technical support on the MB86065 may be e-mailed to:
Page 48 of 56
Disclaimer : The contents of this document are subject to change without notice. Customers are advised to consult with FUJITSU sales representatives before
• {repeat above instruction 2045 times}
• 0x13
• 0x23
• 0x22
• 0x23
• {repeat above instruction 2045 times}
• 0x23
• 0x12
• 0x22
• 0x11
• 0x21
• 0x10
• 0x10
• 0x00
• msd.support@fme.fujitsu.com
Technical Support
ordering.The information and circuit diagrams in this document are presented “as is”, no license is granted by implication or otherwise.
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0xXXXXXXX
0x27FF800
0xXXXXXXX
0xXXXXXXX
0x0FFF800
0x0FFF800
0x30
0x30
0x01
0x00
0x10
Production
{write last data word}
{write first data word}
program RAM controller: RAM A, ODD, write
{write next data word}
{write last data word}
program RAM controller: RAM B, EVEN, run
program RAM controller: RAM B, ODD, run
set EVEN Mux0 = Mux1 = RAM data
set ODD Mux0 = Mux1 = RAM data
set software reset to sync RAMs
clear software reset to sync RAMs
set WMM/LVDS data mux to WMM
Copyright © 2004-2007 Fujitsu Microelectronics Europe GmbH
MB86065 14-bit 1+GSa/s DAC
September 2007 Version 1.01
FME/MS/DAC80S/DS/5344

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