HW-V5-PCIE2-UNI-G Xilinx Inc, HW-V5-PCIE2-UNI-G Datasheet - Page 7

• Manufacturer Part Number: HW-V5-PCIE2-UNI-G
• Description: KIT DEV PCIEXPRESS GTX VIRTEX5
• Manufacturer: Xilinx Inc
• Series: Virtex™ -5r
• Type: FPGAr

Specifications of HW-V5-PCIE2-UNI-G

• Contents: Board, CD
• For Use With/related Products: Virtex™-5 FPGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

SelectIO™ DC Input and Output Levels
Values for V
operating conditions at the V
all standards meet their specifications. The selected standards are tested at a minimum V
V
Table 7: SelectIO DC Input and Output Levels
DS202 (v5.3) May 5, 2010
Product Specification
Notes:
1.
2.
3.
4.
5.
6.
LVTTL
LVCMOS33,
LVDCI33
LVCMOS25,
LVDCI25
LVCMOS18,
LVDCI18
LVCMOS15,
LVDCI15
LVCMOS12
PCI33_3
PCI66_3
PCI-X
GTLP
GTL
HSTL I_12
HSTL I
HSTL II
HSTL III
HSTL IV
DIFF HSTL I
DIFF HSTL II
SSTL2 I
SSTL2 II
DIFF SSTL2 I
DIFF SSTL2 II
SSTL18 I
SSTL18 II
DIFF SSTL18 I
DIFF SSTL18 II
OH
I/O Standard
Tested according to relevant specifications.
Applies to both 1.5V and 1.8V HSTL.
Using drive strengths of 2, 4, 6, 8, 12, 16, or 24 mA.
Using drive strengths of 2, 4, 6, 8, 12, or 16 mA.
For more information on PCI33_3, PCI66_3, and PCI-X, refer to UG190: Virtex-5 FPGA User Guide, Chapter 6, 3.3V I/O Design Guidelines.
Supported drive strengths of 2, 4, 6, or 8 mA.
voltage levels shown. Other standards are sample tested.
(5)
(2)
(2)
(2)
(2)
(5)
(5)
IL
(2)
(2)
and V
IH
V, Min
–0.3
–0.3
–0.3
–0.3
–0.3
–0.3
–0.2
–0.2
–0.2
–0.3
–0.3
–0.3
–0.3
–0.3
–0.3
–0.3
–0.3
–0.3
–0.3
–0.3
–0.3
–0.3
–0.3
–0.3
–0.3
–0.3
are recommended input voltages. Values for I
OL
50% V
50% V
V
V
V
V
V
V
V
V
V
V
and V
V
V
V
V
V
V
IL
35% V
35% V
35% V
30% V
30% V
35% V
CCO
CCO
REF
REF
CCO
CCO
REF
REF
REF
REF
REF
REF
REF
REF
REF
V, Max
50%
50%
50%
50%
0.8
0.8
0.7
CCO
CCO
– 0.125
– 0.125
– 0.125
– 0.125
– 0.05
– 0.15
– 0.15
– 0.15
– 0.15
– 0.1
– 0.1
– 0.1
– 0.1
– 0.1
– 0.1
OH
CCO
CCO
CCO
CCO
CCO
CCO
– 0.1 50% V
– 0.1 50% V
test points. Only selected standards are tested. These are chosen to ensure that
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
CCO
CCO
65% V
65% V
65% V
50% V
50% V
50% V
REF
REF
CCO
CCO
REF
REF
REF
REF
REF
REF
REF
REF
REF
V, Min
50%
50%
50%
50%
2.0
2.0
1.7
CCO
CCO
+ 0.125
+ 0.125
+ 0.125
+ 0.125
+ 0.05
+ 0.15
+ 0.15
+ 0.15
+ 0.15
+ 0.1
+ 0.1
+ 0.1
+ 0.1
+ 0.1
+ 0.1
www.xilinx.com
CCO
CCO
CCO
CCO
CCO
CCO
+ 0.1
+ 0.1
Virtex-5 FPGA Data Sheet: DC and Switching Characteristics
V
IH
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
CCO
CCO
CCO
CCO
CCO
CCO
CCO
CCO
CCO
CCO
CCO
CCO
CCO
CCO
CCO
CCO
CCO
CCO
CCO
V, Max
V
V
V
3.45
3.45
CCO
CCO
CCO
–
–
OL
+ 0.3
+ 0.3
+ 0.3
+ 0.3
+ 0.3
+ 0.3
+ 0.3
+ 0.3
+ 0.3
+ 0.3
+ 0.3
+ 0.3
+ 0.3
+ 0.3
+ 0.3
+ 0.3
+ 0.3
+ 0.3
+ 0.3
and I
OH
25% V
25% V
10% V
10% V
10% V
25% V
V
V
V
V
TT
TT
TT
TT
V, Max
are guaranteed over the recommended
0.45
V
0.4
0.4
0.4
0.6
0.4
0.4
0.4
0.4
0.4
– 0.61
– 0.81
– 0.47
– 0.60
OL
–
–
–
–
–
–
CCO
CCO
CCO
CCO
CCO
CCO
CCO
V
V
V
V
V
V
V
75% V
75% V
90% V
90% V
90% V
75% V
V
V
V
V
CCO
CCO
CCO
CCO
CCO
CCO
CCO
TT
TT
TT
TT
V, Min
with the respective V
V
N/A
N/A
2.4
+ 0.61
+ 0.81
+ 0.47
+ 0.60
OH
–
–
–
–
–
–
– 0.45
– 0.4
– 0.4
– 0.4
– 0.4
– 0.4
– 0.4
CCO
CCO
CCO
CCO
CCO
CCO
Note(3)
Note(3)
Note(3)
Note(4)
Note(4)
Note(6)
Note(5)
Note(5)
Note(5)
16.2
13.4
mA
I
6.3
8.1
6.7
36
32
16
24
48
OL
8
–
–
–
–
–
–
Note(3)
Note(3)
Note(3)
Note(4)
Note(4)
Note(6)
Note(5)
Note(5)
Note(5)
OL
–16.2
–13.4
–8.1
–6.7
mA
N/A
N/A
–16
I
6.3
–8
–8
–8
OH
–
–
–
–
–
–
and
7