ATICE50 Atmel, ATICE50 Datasheet - Page 26

• Manufacturer Part Number: ATICE50
• Description: EMULATOR IN CIRCUIT MEGAAVR
• Manufacturer: Atmel

Specifications of ATICE50

• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

2523A–AVR–11/02
General Description
3.5.2
3-12
Digital I/O
The Digital IO ports of the ICE50 are realized as shown in Figure 3-17 using CMOS buff-
ers and voltage converters.
Figure 3-17. Digital I/O
The propagation delay of the IO ports are larger for the ICE50 than for the actual emu-
lated part. The diagram below shows the timing data for driving out and reading in a
signal on the IO ports of the Emulator. The data direction register is assumed set to “1”
in Figure 3-18. Table 3-3 shows typical data.
Figure 3-18. Data Direction Register
PULLUP (DDRxy & PORTxy)
DDRxy
PORTxy
PINxy
PINKEEPx
PORTxy
PINxy
Pxy
V
CC
Emulator
LEVEL CONVERTER
DIGITAL I/O
t
OHL
V
t
IHL
CC
Target
V
CC
330K
t
OLH
t
ILH
ICE50 User Guide
36K
Pxy