CAT28C64BL12 ON Semiconductor, CAT28C64BL12 Datasheet

IC EEPROM 64KBIT 120NS 28DIP

CAT28C64BL12

Manufacturer Part Number
CAT28C64BL12
Description
IC EEPROM 64KBIT 120NS 28DIP
Manufacturer
ON Semiconductor
Datasheet

Specifications of CAT28C64BL12

Format - Memory
EEPROMs - Parallel
Memory Type
EEPROM
Memory Size
64K (8K x 8)
Speed
120ns
Interface
Parallel
Voltage - Supply
4.5 V ~ 5.5 V
Operating Temperature
0°C ~ 70°C
Package / Case
28-DIP (0.600", 15.24mm)
Density
64Kb
Interface Type
Parallel
Organization
8Kx8
Access Time (max)
120ns
Write Protection
Yes
Data Retention
100Year
Operating Supply Voltage (typ)
5V
Package Type
PDIP
Operating Temp Range
0C to 70C
Supply Current
30mA
Operating Supply Voltage (min)
4.5V
Operating Supply Voltage (max)
5.5V
Operating Temperature Classification
Commercial
Mounting
Through Hole
Pin Count
28
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
CAT28C64BL-12
CAT28C64BL-12
64K-Bit CMOS PARALLEL EEPROM
FEATURES
DESCRIPTION
The CAT28C64B is a fast, low power, 5V-only CMOS
Parallel EEPROM organized as 8K x 8-bits. It requires a
simple interface for in-system programming. On-chip
address and data latches, self-timed write cycle with
auto-clear and V
eliminate additional timing and protection hardware.
DATA Polling and Toggle status bits signal the start and
end of the self-timed write cycle. Additionally, the
CAT28C64B features hardware and software write
protection.
BLOCK DIAGRAM
© 2009 SCILLC. All rights reserved.
Characteristics subject to change without notice
Fast read access times:
– 90/120/150ns
Low power CMOS dissipation:
– Active: 25 mA max.
– Standby: 100 A max.
Simple write operation:
– On-chip address and data latches
– Self-timed write cycle with auto-clear
Fast write cycle time:
– 5ms max.
CMOS and TTL compatible I/O
Hardware and software write protection
A 5 –A 12
A 0 –A 4
V CC
WE
CE
OE
CC
power up/down write protection
ADDR. BUFFER
INADVERTENT
ADDR. BUFFER
PROTECTION
TIMER
& LATCHES
CONTROL
& LATCHES
LOGIC
WRITE
1
DATA POLLING
HIGH VOLTAGE
TOGGLE BIT
GENERATOR
DECODER
COLUMN
The CAT28C64B is manufactured using Catalyst’s
advanced CMOS floating gate technology. It is designed
to endure 100,000 program/erase cycles and has a data
retention of 100 years. The device is available in JEDEC-
approved 28-pin DIP, TSOP, SOIC, or, 32-pin PLCC
package .
DECODER
AND
ROW
Automatic page write operation:
– 1 to 32 bytes in 5ms
– Page load timer
End of write detection:
– Toggle bit
– DATA
100,000 program/erase cycles
100 year data retention
Commercial, industrial and automotive
temperature ranges
DATA
DATA
DATA
DATA polling
I/O BUFFERS
I/O 0 –I/O 7
8,192 x 8
EEPROM
ARRAY
CAT28C64B
32 BYTE PAGE
REGISTER
Doc. No. MD-1011, Rev. I

Related parts for CAT28C64BL12

CAT28C64BL12 Summary of contents

Page 1

CMOS PARALLEL EEPROM FEATURES Fast read access times: – 90/120/150ns Low power CMOS dissipation: – Active max. – Standby: 100 A max. Simple write operation: – On-chip address and data latches – Self-timed write cycle with auto-clear ...

Page 2

CAT28C64B PIN CONFIGURATION DIP Package ( ...

Page 3

ABSOLUTE MAXIMUM RATINGS* Temperature Under Bias ................. – +125 C Storage Temperature ....................... – +150 C Voltage on Any Pin with (2) Respect to Ground ........... –2. with Respect to Ground ............... –2.0V ...

Page 4

CAT28C64B D.C. OPERATING CHARACTERISTICS 10%, unless otherwise specified. CC Symbol Parameter I V Current (Operating, TTL ( Current (Operating, CMOS) CCC Current (Standby, TTL ( Current ...

Page 5

A.C. CHARACTERISTICS, Read Cycle 10%, unless otherwise specified. CC Symbol Parameter t Read Cycle Time RC CE Access Time Address Access Time AA OE Access Time t OE (1) CE Low to Active Output ...

Page 6

CAT28C64B A.C. CHARACTERISTICS, Write Cycle 10%, unless otherwise specified. CC Symbol Parameter t Write Cycle Time WC t Address Setup Time AS t Address Hold Time Setup Time Hold Time CH ...

Page 7

DEVICE OPERATION Read Data stored in the CAT28C64B is transferred to the data bus when WE is held high, and both OE and CE are held low. The data bus is set to a high impedance state when either CE ...

Page 8

CAT28C64B Page Write The page write mode of the CAT28C64B (essentially an extended BYTE WRITE mode) allows from bytes of data to be programmed within a single EEPROM write cycle. This effectively reduces the byte-write time by ...

Page 9

DATA Polling DATA polling is provided to indicate the completion of write cycle. Once a byte write or page write cycle is initiated, attempting to read the last byte written will output the complement of that data on I/O are ...

Page 10

CAT28C64B HARDWARE DATA PROTECTION The following is a list of hardware data protection features that are incorporated into the CAT28C64B. (1) V sense provides for write protection when V CC falls below 3.5V min. (2) A power on delay mechanism, ...

Page 11

To activate the software data protection, the device must be sent three write commands to specific addresses with specific data (Figure 9). This sequence of commands (along with subsequent writes) must adhere to the page write timing specifications (Figure 11). ...

Page 12

CAT28C64B EXAMPLE OF ORDERING INFORMATION Prefix Device # Suffix CAT 28C64B Optional Product Company Number ID Package P: PDIP J: SOIC (JEDEC) K: SOIC (EIAJ) N: PLCC L: PDIP (Lead free, Halogen free) W: SOIC (JEDEC) (Lead free, Halogen free) ...

Page 13

... Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303-675-2175 or 800-344-3860 Toll Free USA/Canada Fax: 303-675-2176 or 800-344-3867 Toll Free USA/Canada Email: orderlit@onsemi.com © ...

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