ISL22316 Intersil Corporation, ISL22316 Datasheet
ISL22316
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ISL22316 Summary of contents
Page 1
... Data Sheet 2 ® Low Noise, Low Power I C The ISL22316 integrates a single digitally controlled potentiometer (DCP) and non-volatile memory on a monolithic CMOS integrated circuit. The digitally controlled potentiometer is implemented with a combination of resistor elements and CMOS switches. The position of the wipers are controlled by the user through the ...
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... SHDN 6 GND ISL22316 V CC POWER-UP INTERFACE CONTROL AND STATUS LOGIC NON-VOLATILE REGISTERS GND 2 Open drain I C interface clock input Open drain Serial data I/O for the I 2 Device address input for the I C interface ...
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... Full-scale Error (Note 8) TC Ratiometric Temperature Coefficient V (Note 11, 17) RESISTOR MODE (Measurements between R RINL Integral Non-linearity (Note 15) 3 ISL22316 Thermal Information Thermal Resistance (Typical, Note 3) 10 Lead MSOP +0.3 CC Recommended Operating Conditions Temperature Range (Extended Industrial .-40°C to +125° 2.7V to 5.5V CC Power Rating of each DCP . . . . . . . . . . . . . . . . . . . . . . . . . . . .5mW Wiper Current of each DCP . . . . . . . . . . . . . . . . . . . . . . . . . . ± ...
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... Mode Vpor Power-on Recall Voltage V Ramp V Ramp Rate Power-up Delay D EEPROM SPECIFICATION EEPROM Endurance 4 ISL22316 TEST CONDITIONS W option U option W option U option TEST CONDITIONS 400kHz; SDA = Open; (for I C, SCL active, read and write states 400kHz; SDA = Open; (for I ...
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... SDA and SCL Rise Time R t SDA and SCL Fall Time F Cb Capacitive Loading of SDA or SCL Rpu SDA and SCL Bus Pull-up Resistor Off-chip 5 ISL22316 TEST CONDITIONS ≤ Temperature T 55 °C Any pulse narrower than the max spec is suppressed SCL falling edge crossing 30 until ...
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... SU:STA t HD:STA SDA (INPUT TIMING) SDA (OUTPUT TIMING) A0 and A1 Pin Timing START SCL SDA A0 ISL22316 TEST CONDITIONS Before START condition After STOP condition ) and V(R ) are V(R ) for the DCP register set to 7F hex and 00 hex respectively. LSB is the 127 ...
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... TAP POSITION (DECIMAL) FIGURE 3. DNL vs TAP POSITION IN VOLTAGE DIVIDER MODE FOR 10kΩ (W) 1.30 10k 1.10 0.90 0.70 0.50 Vcc = 5.5V 0.30 0.10 50k -0.10 -0.30 -40 - TEMPERATURE (ºC) FIGURE 5. ZSerror vs TEMPERATURE 7 ISL22316 1.4 1.2 1 0.8 0.6 0.4 Vcc = 3.3V -40ºC 0 100 120 2.7 0 25ºC 0.1 0 -0.1 -0.2 80 100 120 FIGURE 4. INL vs TAP POSITION IN VOLTAGE DIVIDER ...
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... TEMPERATURE (ºC) FIGURE 9. END TO END R % CHANGE vs TOTAL TEMPERATURE 300 250 10k 200 150 100 TAP POSITION (DECIMAL) FIGURE 11. TC FOR Rheostat MODE IN ppm 8 ISL22316 (Continued) 0.4 0.2 -0.2 -0.4 -0.6 96 116 FIGURE 8. INL vs TAP POSITION IN Rheostat MODE FOR 105 50k 10k 15 60 ...
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... FIGURE 13. MIDSCALE GLITCH, CODE 3Fh TO 40h Pin Description Potentiometers Pins RH and RL The high (RH) and low (RL) terminals of the ISL22316 are equivalent to the fixed terminals of a mechanical potentiometer. RH and RL are referenced to the relative position of the wiper and not the voltage potential on the terminals. With WR set to 127 decimal, the wiper will be closest to RH, and with the WR set to 0, the wiper is closest to RL ...
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... Protocol Conventions Data states on the SDA line must change only during SCL LOW periods. SDA state changes during SCL HIGH are reserved for indicating START and STOP conditions (See Figure 2). On power-up of the ISL22316 the SDA pin is in the input mode. 2 All I ...
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... The ISL22316 responds with an ACK after recognition of a START condition followed by a valid Identification Byte, and once again after successful receipt of an Address Byte. The ISL22316 also responds with an ACK after receiving a Data Byte of a write operation. The master must respond with an ...
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... Address Byte, a second START, and a second Identification byte with the R/W bit set to “1”. After each of the three bytes, the ISL22316 responds with an ACK. Then the ISL22316 transmits Data Bytes as long as the master responds with an ACK during the SCL cycle following the eighth bit of each byte ...
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... However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com 13 ISL22316 M10.118 (JEDEC MO-187BA) 10 LEAD MINI SMALL OUTLINE PLASTIC PACKAGE SYMBOL ...