isl6225 Intersil Corporation, isl6225 Datasheet

isl6225

Manufacturer Part Number

isl6225

Description

Dual Mobile-friendly Pwm Controller With Ddr Memory Option

Manufacturer

Intersil Corporation

Datasheet

1.ISL6225.pdf (19 pages)

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Dual Mobile-Friendly PWM Controller with

DDR Memory Option

The ISL6225 dual PWM controller delivers high efficiency and

tight regulation from two voltage regulating synchronous buck

DC/DC converters. The ISL6225 PWM power supply controller

was designed especially for DDR DRAM, SDRAM, and graphic

chipset applications in high performance desknote PCs,

notebook PCs, sub-notebook PCs, and PDAs.

Automatic mode selection of constant-frequency synchronous

rectification at heavy load, and hysteretic diode-emulation at

light load, assure high efficiency over a wide range of

conditions. The hysteretic mode of operation can be disabled

separately on each PWM converter if constant-frequency

continuous-conduction operation is desired for all load levels.

Efficiency is further enhanced by using the lower MOSFET

Voltage-feed-forward ramp modulation, average current mode

control, and internal feedback compensation provide fast

response to input voltage and output load transients. Input

current ripple is minimized by channel to channel PWM

phase shift of 0°, 90°, or 180° determined by input voltage

and status of the DDR pin.

The ISL6225 can control two independent output voltages

adjustable from 0.9V to 5.5V or, by activating the DDR pin,

transform into a complete DDR memory power supply

solution. In DDR mode, CH2 output voltage VTT tracks CH1

output voltage VDDQ. CH2 output can both source and sink

current, an essential power supply feature for DDR memory

systems. The reference voltage VREF required by DDR

memory is generated as well.

In dual power supply applications the ISL6225 monitors the

output voltage of both CH1 and CH2. An independent

PGOOD (power good) signal is asserted for each channel

after the soft-start sequence has completed, and the output

voltage is within ±10% of the set point. In DDR mode CH1

generates the only PGOOD signal.

Built-in overvoltage protection prevents the output from

going above 115% of the set point by holding the lower

MOSFET on and the upper MOSFET off. When the output

voltage decays below the overvoltage threshold, normal

operation automatically resumes. Once the soft-start

sequence has completed, under-voltage protection may

latch the ISL6225 off if either output drops below 75% of its

set point value.

Adjustable overcurrent protection (OCP) monitors the

voltage drop across the r

more precise current-sensing is required, an external current

sense resistor may be used.

DS(ON)

as the current sense element.

DS(ON)

of the lower MOSFET. If

Data Sheet

1-888-INTERSIL or 321-724-7143

CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.

Features

• Provides regulated output voltage in the range of 0.9V-5.5V

• Complete DDR memory power solution

• No current-sense resistor required

• Under-voltage lock-out on V

• Dual input voltage mode operation

• Excellent dynamic response

• Power-good signal for each channel

• 300kHz switching frequency

• Pb-Free Available (RoHS Compliant)

Applications

• Mobile PCs

• PDAs

• Hand-held portable instruments

Ordering Information

NOTES:

ISL6225CA

ISL6225CAZ (Note 1)

ISL6225CAZA (Note 1)

1. Intersil Pb-free products employ special Pb-free material sets; molding

2. Add “-T” for Tape and Reel.

December 28, 2004

- High efficiency over wide load range

- Synchronous buck converter with hysteretic operation at

- Inhibit Hysteretic mode on one, or both channels

- VTT tracks VDDQ/2

- VDDQ/2 buffered reference output

- Uses MOSFET r

- Optional current-sense resistor for precision overcurrent

- Operates directly from battery 5V to 24V input

- Operates from 3.3V or 5V system rail

- VCC from 5V only

- Combined voltage feed-forward and average current

- 180° channel to channel phase operation for reduced input

- 0° channel to channel phase operation in DDR mode for

- 90° channel to channel phase operation for reduced input

PART NUMBER

compounds/die attach materials and 100% matte tin plate termination

finish, which are RoHS compliant and compatible with both SnPb and

Pb-free soldering operations. Intersil Pb-free products are MSL

classified at Pb-free peak reflow temperatures that meet or exceed

the Pb-free requirements of IPC/JEDEC J STD-020.

light load

mode control

ripple when not in DDR mode

reduced channel interference

ripple in DDR mode when VIN is at GND.

All other trademarks mentioned are the property of their respective owners.

Intersil (and design) is a registered trademark of Intersil Americas Inc.

DS(ON)

TEMP. (°C)

-10 to 85

-10 to 85 28 Ld SSOP (Pb-free) M28.15

28 Ld SSOP

PACKAGE

ISL6225

FN9049.7

M28.15

DWG. #

PKG.

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