isl6423 Intersil Corporation, isl6423 Datasheet
isl6423
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isl6423 Summary of contents
Page 1
... Voltage Regulator with I C Interface for Advanced Satellite Set-Top Box Designs DiSEqC 2.0 Compatible The ISL6423 is a highly integrated voltage regulator and interface IC, specifically designed for supplying power and control signals from advanced satellite set-top box (STB) modules to the low noise blocks (LNBs) of single antenna ports ...
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... TCAP 6 ADDR0 7 22 TDOUT ADDR1 8 21 TDIN BYPASS PGND 10 GATE VSW 12 17 AGND SELVTOP TXT ISL6423 (QFN) TOP VIEW SGND 1 TCAP 2 ADDR0 3 ADDR1 4 BYPASS 5 PGND EXTM 18 SDA 17 SCL 16 TDOUT 15 TDIN ...
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Block Diagram OVERCURRENT COUNTER PROTECTION LOGIC SCHEME 1 PWM LOGIC GATE PGND 6 ILIM1 CS AMP CS ∑ 9 COMPENSATION TDOUT 15 TXT TONE DECODER TTH TDIN 14 VSW AGND 12 ON CHIP VCC ...
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... C25 47n 1µ C27 0.22µF SGND EXTM 2 17 TCAP SDA 3 16 ADDR0 U2 SCL 4 15 ADDR1 ISL6423ER TDOUT C26 1µ BYPASS TDIN 6 13 PGND NOTE : SDA and SCL require pull up to the required logic level. C19 C20 10µF 10µ ...
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... Dynamic Output Current Limiting Dynamic Overload Protection Off Time Dynamic Overload Protection On Time Static Output Current Limiting Cable Fault CABF Threshold 5 ISL6423 Thermal Information Thermal Resistance (Typical, Notes 2, 3) QFN Package TSSOP Package . . . . . . . . . . . . . . . . . Maximum Junction Temperature (Note +150°C Maximum Storage Temperature Range . . . . . . . . . . -40°C to +150°C Operating Temperature Range . . . . . . . . . . . . . . . . . -20° ...
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... Input Bias Current Overcurrent Threshold ERROR AMPLIFIER Open Loop Voltage Gain Gain Bandwidth Product PWM Maximum Duty Cycle Minimum Pulse Width OSCILLATOR Oscillator Frequency 6 ISL6423 = -20°C to +85°C, unless otherwise noted. Typical values are SYMBOL TEST CONDITIONS f ENT = H tone V ENT = 5mA ...
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... The signal pin TXT changes the decoder threshold during tone transmit and receive. TTH allows threshold control through I 10. The tone rise and fall times are not shown due to resolution of graphics 10µs typical for 22kHz. 11. The EXTM pins have input thresholds of Vil(max) = 0.8V and Vih(min) = 1.7V 7 ISL6423 = -20°C to +85°C, unless otherwise noted. Typical values are SYMBOL ...
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... SELVTOP pins to be active. Setting VSPEN high disables this pins and voltage selection will be done 2 using the I C bits VBOT and VTOP only. TDIN, TDOUT TDIN is the tone decoder input and TDOUT is the tone detector output. TDOUT is an open drain output. 8 ISL6423 0.90 0.80 0.70 I _max OUT ...
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... Functional Description The ISL6423 single output voltage regulator makes an ideal choice for advanced satellite set-top box and personal video recorder applications. The device utilizes built-in DC/DC step up converters that, operates from a single supply source ranging from 8V to 14V, and generates the voltage needed to enable the linear post-regulator to work with a minimum of dissipated power ...
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... When the bus is free, both lines are HIGH. The output stages of ISL6423 will have an open drain/open collector in order to perform the wired-AND function. Data on the I transferred up to 100kbps in the standard-mode 400kbps in the fast-mode. The level of logic “ ...
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... SDA line remains at the HIGH level during the ninth clock pulse time. In this case, the master transmitter can generate the STOP information in order to abort the transfer. The ISL6423 will not generate the acknowledge if the POWER OK signal from the UVLO is LOW. SCL ...
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... NOTE: X indicates “Read Only” and is a “Don’t Care” for the Write mode. 12 ISL6423 TABLE 7. STATUS REGISTER SR1 CONFIGURATION OUVF OLF BCF SR1 is selected Iout ≤ set limit, normal operation ...
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... Received Data ( bus READ MODE The ISL6423 can provide to the master a copy of the system 2 register information via the I C bus in read mode. The read mode is Master activated by sending the chip address with R/W bit set the following Master generated clock bits, the ISL6423 issues a byte on the SDA data bus line (MSB transmitted first) ...
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... CABle Fault or open status bit. OUVF Over and Under Voltage Fault status bit OLF Over Load Fault status bit BCF Backward Current Fault bit TTH Tone THreshold is the OR of the signal pin TXT 14 ISL6423 Electrical Characteristics TABLE 12. TEST PARAMETER CONDITION Input Logic SDA, SCL ...
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... Package Outline Drawing L24.4x4D 24 LEAD QUAD FLAT NO-LEAD PLASTIC PACKAGE Rev 2, 10/06 4.00 PIN 1 INDEX AREA (4X) 0.15 TOP VIEW ( TYP ) ( TYPICAL RECOMMENDED LAND PATTERN 15 ISL6423 4X A 20X 24X ± BOTTOM VIEW ± SIDE VIEW ( 20X 24X 24X 0 ...
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... However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com 16 ISL6423 M28.173B 28 LEAD THIN SHRINK SMALL OUTLINE PLASTIC PACKAGE M ...