TDA7309 STMicroelectronics, TDA7309 Datasheet

IC PROCESSOR STER/AUDIO 20-PDIP

TDA7309

Manufacturer Part Number
TDA7309
Description
IC PROCESSOR STER/AUDIO 20-PDIP
Manufacturer
STMicroelectronics
Type
Audio Processorr
Datasheet

Specifications of TDA7309

Mounting Type
Through Hole
Package / Case
20-DIP (0.300", 7.62mm)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Applications
-

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1
2
The TDA7309 is a control processor with indepen-
dent left and right volume control for quality audio
applications. Selectable external loudness and
soft mute functions are provided.
Control is accomplished by serial I
processor interface.
Figure 2. Block Diagram
March 2006
INPUT MULTIPLEXER:
3 STEREO INPUTS
RECORD OUTPUT FUNCTION
LOUDNESS FUNCTION
VOLUME CONTROL IN 1dB STEPS
INDEPENDENT LEFT AND RIGHT VOLUME
CONTROL
SOFT MUTE FUNCTION
ALL FUNCTIONS PROGRAMMABLE VIA
SERIAL I
FEATURES
DESCRIPTION
DIGITAL CONTROLLED STEREO AUDIO PROCESSOR
INPUTS
INPUTS
RIGHT
2
LEFT
C BUS
2.2µF
2.2µF
3 x
3 x
17
18
20
14
13
11
V S
16
AGND
SUPPLY
2
7
C bus micro-
SELECTOR
INPUT
CREF
15
Recout(R)
Recout(L)
10
22µF
1
TDA7309
SERIAL BUS DECODER + LATCHES
LOUD(R)
LOUD(L)
The AC signal setting is obtained by resistor net-
works and switches combined with operational
amplifiers.
Thanks to the used BIPOLAR/CMOS Technology,
Low Distortion, Low Noise and Low DC stepping
are obtained.
Figure 1. Packages
Table 1. Order Codes
LOUDNESS
LOUDNESS
VOLUME +
VOLUME +
19
12
TDA7309D013TR
100nF
100nF
Part Number
TDA7309D
TDA7309
DIP20
MUTE
SOFT
WITH LOUDNESS
MUTE
MUTE
D93AU045A
2
6
4
5
8
3
9
DIGGND
RIGHT
ADDR
LEFT
CSM
OUT
SDA
SCL
OUT
TDA7309
Tape & Reel
SO20
Package
DIP20
SO20
BUS
Rev. 6
1/14

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TDA7309 Summary of contents

Page 1

... ALL FUNCTIONS PROGRAMMABLE VIA ■ 2 SERIAL I C BUS 2 DESCRIPTION The TDA7309 is a control processor with indepen- dent left and right volume control for quality audio applications. Selectable external loudness and soft mute functions are provided. Control is accomplished by serial I processor interface. Figure 2. Block Diagram 3 x 2.2µ ...

Page 2

... GND 7 14 IN1R ADD 8 13 IN2R OUTR 9 12 LOUDR RecoutR 10 11 IN3R D94AU058A Parameter Test Condition V = 1Vrms 1KHz Parameter IN1L 17 IN2L 18 IN3L 20 RecoutL 1 TDA7309 IN1R 14 IN2R 13 IN3R 11 RecoutR SCL SDA DIGGND Value 10.5 – –55 to +150 Min. Typ. Max 0.01 0.1 ...

Page 3

... A V max C = 22nF –20dB smute Fast Mode Slow Mode d = 0.3% 100 BW = 20-20KHz, flat; output muted all gains = 0dB A curve all gains = 0dB –24dB -24 to –56dB V all gains = 0dB 1Vrms 0. 1.6mA O TDA7309 = 9V 10KΩ 50Ω Typ. Max. Unit KΩ ...

Page 4

... TDA7309 Figure 5. Noise vs. Volume Setting. Figure 6. SVRR vs. Frequency. Figure 7. THD vs. frequency 4/14 Figure 8. THD vs LOAD Figure 9. Channel Separation vs. Frequency. Figure 10. Output Clip Level vs. Supply Voltage. ...

Page 5

... Figure 11. Quiescen Current vs. Supply Voltage Figure 12. Loudness vs. Volume Attenuation Figure 13. Loudness vs. Frequency (C = 100nF) vs. Volume LOAD Figure 14. Loudness vs. External Capacitors TDA7309 5/14 ...

Page 6

... TDA7309 BUS INTERFACE Data transmission from microprocessor to the TDA7313 and viceversa takes place thru the 2 wires I BUS interface, consisting of the two lines SDA and SCL (pull-up resistors to positive supply voltage must be connected). 3.1 Data Validity As shown in fig. 11, the data on the SDA line must be stable during the high period of the clock. The HIGH and LOW state of the data line can only change when the clock signal on the SCL line is LOW ...

Page 7

... MSB D99AU1033 Parameter 2 C-bus HIGH HD;DAT t SU;DAT ACKNOWLEDGMENT FROM RECEIVER Min. Typ. Max. 0 1.3 0.6 1.3 0.6 0.6 0.300 100 HD;STA SP t SU;STA Sr D95AU314 TDA7309 Unit 400 kHz µs µs µs µs µs µs ns 300 ns (*) 300 ns (*) µs SU;STO P 7/14 ...

Page 8

... SOFTWARE SPECIFICATION 4.1 Interface Protocol The interface protocol comprises: A start condition (s) ■ A chip address byte, containing the TDA7309 address (the 8th bit of the byte must be 0). ■ The TDA7309 must always acknowledge at the end of each transmitted byte. A sequence of data (N-bytes + acknowledge) ■ ...

Page 9

... MUTE F1 LSB FUNCTION mute/loud 0 0 slow soft mute fast soft mute on 1 soft mute off LOUD OFF loud on (10dB) loud on (20dB) TDA7309 9/14 ...

Page 10

... TDA7309 Table 12. Input Multiplexer Codes MSB Purchase Components of STMicrolectronics, conveys a license under the Philips I Rights to use these components dard Specifications as defined by Philips. 10/ system, provided that the system conforms to the I F1 LSB FUNCTION inputs 0 0 MUTE 0 1 IN2 1 0 IN3 1 1 IN1 ...

Page 11

... DIM. MIN. TYP. MAX. a1 0.254 B 1.39 1.65 b 0.45 b1 0.25 D 25.4 E 8.5 e 2.54 e3 22.86 F 7.1 I 3.93 L 3.3 Z 1.34 inch MIN. TYP. MAX. 0.010 0.055 0.065 0.018 0.010 1.000 0.335 0.100 0.900 0.280 0.155 0.130 0.053 OUTLINE AND MECHANICAL DATA DIP20 TDA7309 11/14 ...

Page 12

... TDA7309 Figure 21. SO20 Mechanical Data & Package Dimensions mm DIM. MIN. TYP. MAX. A 2.35 2.65 A1 0.10 0.30 B 0.33 0.51 C 0.23 0.32 (1) 12.60 13. 7.40 7.60 e 1.27 H 10.0 10.65 h 0.25 0.75 L 0.40 1.27 k 0˚ (min.), 8˚ (max.) ddd 0.10 (1) “D” dimension does not include mold flash, protusions or gate burrs ...

Page 13

... Table 13. Revision History Date Revision January 2004 March 2006 5 First Issue in EDOCS DMS 6 Modified on the page 8/14 the “MAX CLOCK SPEED” to 400kbits/s. Description of Changes TDA7309 13/14 ...

Page 14

... TDA7309 Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST’s terms and conditions of sale. ...

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