uja1023 NXP Semiconductors, uja1023 Datasheet
uja1023
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uja1023 Summary of contents
Page 1
... In case of a failure (e.g. LIN bus short to ground) the output changes over to a user programmable limp home output state and the low-power Limp home mode will be entered. Due to the advanced low-power behavior the power consumption of the UJA1023 in low-power mode is minimal. Product data sheet ...
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... LH sleep, Sleep and - Limp home mode 8 BAT DC value [2] human body model 100 pF 1.5 k selected. . The rating for T limits the allowable amb © Koninklijke Philips Electronics N.V. 2006. All rights reserved. UJA1023 LIN-I/O slave Typ Max Unit - + +150 ...
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... UJA1023 AUTO BIT RATE LIN DETECTION CONTROLLER VIO 1 2 INH BAT 3 LIN 4 UJA1023T 5 GND 001aab877 Rev. 04 — 5 July 2006 UJA1023 LIN-I/O slave 1 VIO 2 INH INH ADC I/O BLOCK PWM CYCLIC SENSE mdb488 ...
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... I = input output; I/O = input or output. 7. Functional description The UJA1023 combines all blocks necessary to work as a stand-alone LIN slave. Various I/O functions typically used in a car are supported. For a more detailed description refer to Section 7.2 7.1 Short description of the UJA1023 7.1.1 LIN controller The LIN 2.0 controller monitors and evaluates the LIN messages in order to process the LIN commands. It supervises and executes the NAD assignment, ID assignment and I/O-confi ...
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... Philips Semiconductors electromagnetic emission. The required LIN slave termination already integrated. In case of LIN bus faults the UJA1023 switches to the low-power Limp home mode. 7.1.3 Automatic bit rate detection The automatic bit rate detection adapts to the LIN master’s bit rate. Any bit rate between 1 kbit/s and 20 kbit/s can be handled. This block checks whether the synchronization break and synchronization fi ...
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... LIN slave nodes. Thus the LIN master can transmit other LIN messages while it (re)configures the UJA1023. Remarks: • The I/O configuration will be enabled during the first usage of the UJA1023 message frames (see • Notation Px is used in this document when referring to a function or property of any of the I/O pins • ...
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NAD (optional) MasterReq SlaveResp ID: 3C ID: 3D Fig 3. Typical configuration flow slave I/O configuration assign frame ID via data dump MasterReq SlaveResp MasterReq ID: 3C ID: 3D ID: 3C enable new I/O configuration PxResp SlaveResp configured RxReq ...
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... In case a different NAD is necessary the assign NAD command has to be used. The assign NAD request is carried out if the Service Identifier (SID) in the third data byte of the MasterReq is the assign NAD request and the fourth to seventh data bytes are the LIN supplier codes of Philips (0x0011) and UJA1023 function ID (0x0000). Table 5. Data ...
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... Service identifier. As SlaveResp the RSID code will be 0xF0. - Supplier ID. Fixed code 0x0011 for Philips. - Function ID. For the UJA1023 this code is fixed as 0x0000 NAD[7:0] Slave Node Address (NAD). NAD values are in the range 1 to 127, while 0 and 128 to 255 are reserved for other purposes. ...
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... Initial NAD 0x21: The input level on the configuration pin C1 and the status flag of the internal DC-switch is read. The UJA1023 will be configured LOW and the DC-switch is open (see slave 2 in configuration uses the data byte D7 as new NAD for its further LIN configuration requests (e ...
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... Fig 4. Daisy chain ID IN CONFIGURATION 1 UJA1023 ASSIGN NAD INITIAL NAD = DAISY CHAIN BAT BAT DC FLAG BAT & & GND BAT LIN PLUG NOT CONFIGURED 2 UJA1023 n ASSIGN NAD INITIAL NAD = DAISY CHAIN BAT DC FLAG BAT & GND BAT LIN GND PLUG mdb492 ...
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... UJA1023 compares the values of the configuration pins C3, C2, and C1 with the values of the data bits D0[2:0]. If the values are equal and bits D0[7:4] are logic 0 and D0[3] is logic 1, the value used as new NAD for the UJA1023. Next, for example, the ‘assign frame ID’ can be used to assign specific ID numbers. ...
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... PLUG INITIAL NAD = PLUG NAD NAD DATA BYTE 7 D0.1 D0.2 D0.0 D0.1 D0.2 COMPARATOR BAT BAT BAT BAT C2 C3 GND BAT LIN PLUG UJA1023 ASSIGN NAD INITIAL NAD = PLUG NAD DATA BYTE 7 D0.0 D0.1 D0.2 COMPARATOR BAT BAT BAT GND BAT LIN GND PLUG ...
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... NAD7 NAD6 NAD5 NAD4 Rev. 04 — 5 July 2006 UJA1023 NAD3 NAD2 NAD1 NAD0 ID3 ...
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... Philips Semiconductors 7.2.1.4 Read by identifi possible to read the supplier identifier, function identifier and the variant of the UJA1023 by means of the read by identifier request. The format for this request is shown in Table in Table Table 11. Data byte Table 12 ...
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... D3. The master can review the new configuration data via the SlaveResp message. Finally if the master considers the received configuration data of the LIN-I correct, it can enable the slave I/O-configuration by using the UJA1023 message frames (see Section It should be noted that for correct I/O configuration, the configuration requests must be sent in sequential order of: fi ...
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... High-side enable for I/O pin Px LSE[7:0] Low-side enable for I/O pin Px. OM0_[7:0], Output mode for I/O pin Px. OM1_[7:0] OM1_x Rev. 04 — 5 July 2006 UJA1023 Table 5). OM0_x 0 level 1 reserved 0 cyclic sense 1 PWM © Koninklijke Philips Electronics N.V. 2006. All rights reserved. LIN-I/O slave ...
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... Unassigned pins can be used as I/O. It should be noted, however, that for the unassigned pins, which are configured in Capture mode, the captured edge value will not be transferred. Rev. 04 — 5 July 2006 UJA1023 Table 17) is selected only if D3 and NAD2 ...
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... The slave node address is assigned with the assign NAD command (see PCI[7:0] Protocol control information SID[7:0] Service identifier. As SlaveResp the RSID value will be 0xF4. Rev. 04 — 5 July 2006 UJA1023 …continued CM0_x 0 no capture 1 falling edge 0 rising edge ...
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... D6 and Table 21 used for I/O-pin configuration but to provide the master with diagnosis data of the UJA1023 read-only data block. If the slave node address matches and the fourth data block is selected, the UJA1023 transmits its diagnosis data via the SlaveResp message. ...
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... LHE Set if Limp home mode is entered. 0 ERR Response error. Sets internal signal Response_Error if there is an RxB TxB during a response frame PL[7:0] PxOut latch value. - Not used. Rev. 04 — 5 July 2006 UJA1023 NAD3 NAD2 NAD1 NAD0 ...
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... Philips Semiconductors 7.2.1.6 Configuration examples Example 1, UJA1023 configuration with eight low-side outputs. // //Example 8 LSE and walking ‘1’ pattern //C1, C2 and C3 are GND //SB = SyncBreak SyncField // ...
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... Philips Semiconductors Example 2, UJA1023 configuration with eight inputs and edge capture. // //Example 8 inputs with capture //C1, C2 and C3 are GND //SB = SyncBreak SyncField // ...
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... OR local wake- limp home value OR sleep mode command AND LSLP = 1 Rev. 04 — 5 July 2006 UJA1023 (NAD not assigned OR not used) AND remote wake-up (NAD assigned OR default used) AND remote wake-up failure OR sleep mode command ...
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... Sleep mode The UJA1023 enters its Sleep mode when the ‘Sleep mode command’ has been received and the limp home sleep bit LSLP is reset (LSLP = 0). In Sleep mode the UJA1023 keeps the current status on its Px. The INH will switch to high-impedance state. ...
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... Inputs can always be read via a PxResp frame (see determined by the TH bits in the second I/O configuration block (see 7.2.3.2 Level mode In Level mode the PxOut register of the UJA1023 can be set or reset. Depending on the Px configuration the PxOut value is output. 7.2.3.3 PWM mode The PWM mode provides a PWM signal with 8-bit resolution to the I/O-stage. The base frequency is typically 700 kHz divided by 256 (8-bit) and becomes approximately 2.7 kHz. The mode is entered via both mode confi ...
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... PxOut OPEN t sample active edge shows an application example Table 18). Table 18). Rev. 04 — 5 July 2006 UJA1023 CLOSE 4 switch matrix with the UJA1023. The 4 switch matrix without extra © Koninklijke Philips Electronics N.V. 2006. All rights reserved. LIN-I/O slave 1 %). mdb495 ...
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... A switch matrix can be configured as local wake-up. If the data bit SMW (D3.2) of the second configuration block is set to logic 1, a change of a matrix switch input value causes a wake-up of the UJA1023 addition the Switch matrix capture mode is enabled via SMC the switch matrix value of PxResp represents the local wake-up source switch of the switch matrix ...
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... ADC mode enables an ADC control loop. The output level of the push-pull stage is defined via the V 7.2.5 LIN-I/O message frames The UJA1023 uses one LIN command to receive data PxReq and one to transmit data PxResp respectively. The IDs for PxReq and PxResp are configured by means of the ‘assign frame ID’ command as described in Please note that the I/O confi ...
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... Fig 9. Analog-to-digital converter Table 25. Data byte D0 D1 [1] D2 [1] The UJA1023 expects to receive data byte D2 only if bit RxDL = 1 (bit 3 of byte D3 in the first I/O configuration data block, see Table 26. Byte D0 D1 [1] D2 [1] The UJA1023 expects to receive data byte D2 only if bit RxDL = 1 (bit 3 of byte D3 in the first I/O confi ...
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... Switch matrix value 1. [ PWM[7:0] PWM value ADC[7:0] ADC value. The ADC value is transmitted only if the INH output is in ADC mode (IM0 = 1, IM1 = 0). Table 17 and Table 18). Rev. 04 — 5 July 2006 UJA1023 EC4 EC3 EC2 EC1 SM50 ...
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... Philips Semiconductors 7.3 I/O block 7.3.1 I/O pins The I/O-pin structure of the UJA1023 is shown in Fig 10. I/O-pin structure The output is configurable as: • Push-pull • High-side switch • Low-side switch • High-impedance The input can be configured: • To capture on falling, rising or both edges • To provide an internal pull-up • ...
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... Section of the high-side driver, which enables the low on(HS) 1 %). Section 7.2.4 and Figure 11). After power-on the © Koninklijke Philips Electronics N.V. 2006. All rights reserved. UJA1023 LIN-I/O slave Edge capture none both fall rise 10. The R ...
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... In addition the configuration pin C3 has a low-side driver to provide the output signal during daisy chain ID configuration. Fig 12. Configuration pin structure 7.5 LIN transceiver The integrated LIN transceiver of the UJA1023 is compliant with LIN 2.0 / SAE J2602 and provides: • Integrated 30 k termination resistor • ...
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... The first mode after power-on is the Off-line mode. The transmitter and receiver are both switched off, but wake-up events will be recognized. Any LIN wake-up event will wake-up the UJA1023. Within Sleep mode any wake-up event is automatically forwarded to the LIN (protocol) controller, the Normal mode will be entered and the LIN-transceiver automatically enters the Active mode. It should be noted that the fi ...
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... ISO 7637 charged device model human body model 100 pF 1.5 k charged device model limits the allowable combinations of power dissipation (P) and ambient temperature (T vj Thermal characteristics Parameter thermal resistance from junction to ambient Rev. 04 — 5 July 2006 UJA1023 Min Max 0.3 +40 0.3 V BAT 27 +40 ...
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... Normal mode; ADC enabled; no load at Px and INH; high-side switches enabled configuration pins disabled configuration pins enabled Rev. 04 — 5 July 2006 UJA1023 = 500 ; all voltages are referenced to GND; Min Typ Max 6 100 - ...
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... V BAT LIN dominant; t < t to(dom LIN BAT LIN BAT Active mode Active mode Active mode Active mode Rev. 04 — 5 July 2006 UJA1023 = 500 ; all voltages are referenced to GND; Min Typ Max - - 0 3 VIO 0.3 - +2.1 2.0 - ...
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... BAT V = 0.389 V ; th(rec)(min) BAT V = 0.251 V ; th(dom)(min) BAT LSC = bit BAT after local wake-up, sent by slave Rev. 04 — 5 July 2006 UJA1023 = 500 ; all voltages are referenced to GND; Min Typ Max [2] - 200 - [2][3] - 1.5 - [5] 0.396 - - [ 0.581 [5] ...
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... R = 100 6 VIO BAT VIO BAT = 660 and R bus bus bus Rev. 04 — 5 July 2006 UJA1023 = 500 ; all voltages are referenced to GND; Min Typ [ bit - - [ [2] - 350 [2] - 262 ...
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... Rev. 04 — 5 July 2006 UJA1023 LIN-I/O slave V th(rec)(max) thresholds of V receiving node 1 th(dom)(max) V th(rec)(min) thresholds of receiving node 2 V th(dom)(min) t p(rx2)f 001aae375 © Koninklijke Philips Electronics N.V. 2006. All rights reserved. ...
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... UJA106x V LIN bus BAT LIN SLAVE NODE ECU INH VIO BAT C BAT LIN C LIN GND LIN I/O SLAVE UJA1023 Rev. 04 — 5 July 2006 UJA1023 SPI SPI INTERFACE INTERFACE RSTN RSTN INTN INTN RXDL RXD TXDL TXD MICROCONTROLLER SWITCH BACKGROUND ILLUMINATION ...
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... detail 6.2 1.0 0.7 1.05 0.25 0.25 5.8 0.4 0.6 0.039 0.028 0.041 0.01 0.01 0.016 0.020 EUROPEAN PROJECTION © Koninklijke Philips Electronics N.V. 2006. All rights reserved. UJA1023 LIN-I/O slave SOT109 ( 0.7 0 0.028 0.004 0.012 ISSUE DATE 99-12-27 03-02- ...
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... 225 Pb-free process - package peak reflow temperatures (from J-STD-020C July 2004) 3 Volume mm < 350 260 260 250 Rev. 04 — 5 July 2006 UJA1023 3 < 350 Volume mm 225 225 Volume mm 350 to Volume mm 2000 ...
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... Suitability of surface mount IC packages for wave and reflow soldering methods [1] [3] , LBGA, LFBGA, SQFP, [3] , TFBGA, VFBGA, XSON , SO, SOJ [8] [9] [8] , PMFP , WQCCN..L Rev. 04 — 5 July 2006 UJA1023 LIN-I/O slave Soldering method Wave Reflow not suitable suitable [4] not suitable suitable suitable suitable [5][6] not recommended ...
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... Product data sheet - mode”: updated allocation”: updated description”: updated characteristics”: updated characteristics”: updated Preliminary data sheet - Objective specification - Rev. 04 — 5 July 2006 UJA1023 LIN-I/O slave Supersedes UJA1023_3 UJA1023_2 - © Koninklijke Philips Electronics N.V. 2006. All rights reserved ...
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... Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. Rev. 04 — 5 July 2006 UJA1023 LIN-I/O slave © Koninklijke Philips Electronics N.V. 2006. All rights reserved ...
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... General description . . . . . . . . . . . . . . . . . . . . . . 1 2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 3 Quick reference data . . . . . . . . . . . . . . . . . . . . . 2 4 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 5 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 3 6 Pinning information . . . . . . . . . . . . . . . . . . . . . . 3 6.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 6.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 4 7 Functional description . . . . . . . . . . . . . . . . . . . 4 7.1 Short description of the UJA1023 7.1.1 LIN controller . . . . . . . . . . . . . . . . . . . . . . . . . . 4 7.1.2 LIN transceiver (including termination 7.1.3 Automatic bit rate detection . . . . . . . . . . . . . . . 5 7.1.4 Oscillator 7.1.5 I/O block . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 7.1.6 ADC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 7.1.7 PWM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 7.1.8 Cyclic sense . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 7.2 LIN controller ...