X9260 INTERSIL [Intersil Corporation], X9260 Datasheet
X9260
Available stocks
Related parts for X9260
X9260 Summary of contents
Page 1
... CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 1-888-352-6832 XDCP is a trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 2005. All Rights Reserved All other trademarks mentioned are the property of their respective owners. X9260 FN8170.0 integrates 2 digitally ...
Page 2
... Set the scale factor and zero point in sensor signal conditioning circuits • Vary the frequency and duty cycle of timer ICs • Vary the dc biasing of a pin diode attenuator in RF circuits • Provide a control variable ( feedback circuits 2 X9260 Power-on Recall R ...
Page 3
... PIN ASSIGNMENTS Pin Pin (SOIC) (XBGA X9260 1 HOLD A SCK Symbol SO Serial Data Output for SPI bus A0 Device Address for SPI bus Connect ...
Page 4
... S (CS) HIP ELECT When CS is HIGH, the X9260 is deselected and the SO pin is at high impedance, and (unless an internal write cycle is underway) the device will be in the standby state. CS LOW enables the X9260, placing it in the active power mode. It should be noted that after a power-up, a HIGH to LOW transition required prior to the start of any operation ...
Page 5
... This can help to reduce system pin count. Array Description The X9260 is comprised of a resistor array (See Figure 1). The array contains the equivalent of 255 discrete resistive segments that are connected in series. The physical ends of each array are equivalent ...
Page 6
... Finally loaded with the contents of its Data Register zero (DR0) upon power-up. The Wiper Counter Register is a volatile register; that is, its contents are lost when the X9260 is powered- down. Although the register is automatically loaded with the value in DR0 upon power-up, this may be different from the value present at power-down ...
Page 7
... CS going HIGH to LOW, is called the Identification Byte. The most significant four bits of the slave address are a device type identifier. The ID[3:0] bits is the device id for the X9260; this is fixed as 0101[B] (refer to Table 3). The AD[3:0] bits in the ID byte is the internal slave address. The physical device address is defined by the state of the input pins ...
Page 8
... Figure 5). Four instructions require a two-byte sequence to complete. These instructions transfer data between the host and the X9260; either between the host and one of the data registers or directly between the host and the Wiper Counter Register. These instructions ...
Page 9
... Internal Device ID Address Figure 4. Three-Byte Instruction Sequence (Read) CS SCL ID3 ID2 ID1 ID0 Internal Device ID Address S0 9 X9260 Instruction Internal Opcode Address Instruction Register Address Opcode ...
Page 10
... Figure 6. Increment/Decrement Instruction Sequence CS SCL ID3 ID2 ID1 ID0 Device ID Internal Address Figure 7. Increment/Decrement Timing Limits SCK INC/DEC CMD ISSUED 10 X9260 Instruction Register Pot/WCR Opcode Address Address ...
Page 11
... Wiper Counter Register XFR Wiper Counter 1 Register to Data Register Global XFR Data Registers 0 to Wiper Counter Registers Global XFR Wiper Counter 1 Registers to Data Register Increment/Decrement 0 Wiper Counter Register Note: 1/0 = data is one or zero 11 X9260 Instruction Set 1/0 0 ...
Page 12
... Global Transfer Data Register (DR) to Wiper Counter Register (WCR) Device Type Device CS Identifier Addresses Falling Edge X9260 Instruction WCR Opcode Addresses (Sent by X9260 on SO Instruction WCR Opcode Addresses (Sent by Host on SI ...
Page 13
... CS Opcode Addresses Rising Edge Instruction DR and WCR CS Opcode Addresses Rising Edge Instruction WCR Increment/Decrement Opcode Addresses (Sent by Master on SDA) Instruction WCR Opcode Addresses (Sent by X9260 on SO) 0 HIGH-VOLTAGE WRITE CYCLE HIGH-VOLTAGE WRITE CYCLE CS Rising Edge . . . . I/D I/D Data Byte CS Rising Edge WIP FN8170 ...
Page 14
... Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Max. +70°C +85°C X9260-2.7 Device Supply Voltage (V 5V ± 10% X9260 2.7V to 5.5V V+ 2.7V to 5.5V V- -2.5V to -5.5V (4) ) Limits CC FN8170.0 February 28, 2005 ...
Page 15
... 255, single pot H L (4) During power-up V > ( …,255 …, 254. 15 X9260 Limits Min. Typ. X9260 +4.5 X9260-2.7 +2.7 X9260 -5.5 X9260-2.7 -5 -120 0.4 ±300 10/10/25 , and Max. Unit Test Conditions ± 25°C, each pot ± ...
Page 16
... Notes: (6) This parameter is not 100% tested (7) t and t are the delays required from the time the (last) power supply (V PUR PUW These parameters are not 100% tested. 16 X9260 (Over the recommended operating conditions unless otherwise specified.) Limits Min. Typ. Max. 400 1 ...
Page 17
... HZ t HOLD high to output in low Noise suppression time constant at SI, SCK, HOLD and CS inputs deselect time CS t WP, A0 setup time WPASU t WP, A0 hold time WPAH 17 X9260 3V 1382Ω SO pin 1217Ω 100pF Parameter SPICE Macromodel R TOTAL ...
Page 18
... WAVEFORM INPUTS Must be steady May change from Low to High May change from High to Low Don’t Care: Changes Allowed N/A 18 X9260 Parameter Parameter OUTPUTS Will be steady Will change from Low to High Will change from High to Low Changing: State Not Known Center Line ...
Page 19
... TIMING DIAGRAMS Input Timing CS t LEAD SCK MSB SI High Impedance SO Output Timing CS SCK t V MSB SO ADDR SI Hold Timing CS SCK HOLD 19 X9260 t CYC ... ... ... t HO ... t t HSU HH ... HOLD LAG t RI LSB t DIS ...
Page 20
... XDCP Timing (for All Load Instructions) CS SCK MSB SI VWx High Impedance SO Write Protect and Device Address Pins Timing X9260 ... t WRL ... (Any Instruction WPASU WPAH LSB FN8170.0 February 28, 2005 ...
Page 21
... Offset Voltage Adjustment 100kΩ – + TL072 10kΩ 10kΩ 10kΩ +12V -12V 21 X9260 Comparator with Hysterisis Two terminal Variable Resistor; Variable current Voltage Regulator V (REG) ...
Page 22
... G ≤ +1/2 Inverting Amplifier – Function Generator – + frequency ∝ amplitude ∝ X9260 10kΩ Filter – ...
Page 23
... Total Ball Count Ball Count X Axis Ball Count Y Axis Pins Pitch X Axis Pins Pitch Y Axis Edge to Ball Center (Corner) Distance Along X Edge to Ball Center (Corner) Distance Along Y 23 X9260 24-Ball BGA (X9260TA/X9260UA Bottom View (Bump Side Up Millimeters ...
Page 24
... PACKAGING INFORMATION 24-Lead Plastic Small Outline Gull Wing Package Type S Pin 1 Index Pin 1 (4X) 7° 0.050 (1.27) 0.010 (0.25) 0.020 (0.50) 0° - 8° 0.015 (0.40) 0.050 (1.27) NOTE: ALL DIMENSIONS IN INCHES (IN PARENTHESES IN MILLIMETERS) 24 X9260 0.014 (0.35) 0.020 (0.50) 0.598 (15.20) 0.610 (15.49) X 45° 0.009 (0.22) 0.420" 0.013 (0.33) FOOTPRINT 0.393 (10.00) 0.290 (7.37) 0.299 (7.60) ...
Page 25
... X9260 xxxx X9260xxxxx I-2.7 X9260xxxx-2.7 X9260xxxx xx X9260 xxxx X9260xxxxx I-2.7 All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems. Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use ...