PESD5V0S1BA,115 NXP Semiconductors, PESD5V0S1BA,115 Datasheet - Page 8

• Manufacturer Part Number: PESD5V0S1BA,115
• Description: DIODE BIDIR ESD PROTECT SOD323
• Manufacturer: NXP Semiconductors

Specifications of PESD5V0S1BA,115

• Package / Case: SC-76, SOD-323, UMD2
• Voltage - Reverse Standoff (typ): 5V
• Voltage - Breakdown: 5.5V
• Power (watts): 130W
• Polarization: Bidirectional
• Mounting Type: Surface Mount
• Polarity: Bidirectional
• Clamping Voltage: 10 V
• Operating Voltage: 5 V
• Breakdown Voltage: 9.5 V
• Termination Style: SMD/SMT
• Peak Surge Current: 12 A
• Peak Pulse Power Dissipation: 130 W
• Capacitance: 35 pF
• Maximum Operating Temperature: + 150 C
• Minimum Operating Temperature: - 65 C
• Dimensions: 1.35 (Max) mm W x 1.8 (Max) mm L
• Number Of Elements: 1
• Operating Temperature Classification: Military
• Reverse Breakdown Voltage: 5.5V
• Reverse Stand-off Voltage: 5V
• Leakage Current (max): 100nA
• Peak Pulse Current: 12A
• Test Current (it): 1mA
• Operating Temp Range: -65C to 150C
• Mounting: Surface Mount
• Pin Count: 2
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 568-4053-2; 934058004115; PESD5V0S1BA T/R; PESD5V0S1BA T/R

NXP Semiconductors
7. Application information
PESD5V0S1BA_BB_BL_4
Product data sheet
PESD5V0S1Bx series is designed for the protection of one bidirectional signal line from
the damage caused by ElectroStatic Discharge (ESD) and surge pulses. The devices may
be used on lines where the signal polarities are above and below ground. They provide a
surge capability of up to 130 W per line for a 8/20 s waveform.
Circuit board layout and protection device placement:
Circuit board layout is critical for the suppression of ESD, EFT and surge transients.
The following guidelines are recommended:
1. Place the protection device as close to the input terminal or connector as possible.
2. The path length between the protection device and the protected line should be
3. Keep parallel signal paths to a minimum.
4. Avoid running protection conductors in parallel with unprotected conductor.
5. Minimize all printed-circuit board conductive loops including power and ground loops.
6. Minimize the length of the transient return path to ground.
7. Avoid using shared transient return paths to a common ground point.
8. Ground planes should be used whenever possible. For multilayer printed-circuit
Fig 8.
minimized.
boards, use ground vias.
Bidirectional protection of one signal line
Rev. 04 — 20 August 2009
signal line
Low capacitance bidirectional ESD protection diodes
PESD5V0S1BA/BB/BL
PESD5V0S1Bx
006aaa057
GND
© NXP B.V. 2009. All rights reserved.
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