PESD3V3U1UT,215 NXP Semiconductors, PESD3V3U1UT,215 Datasheet - Page 8

• Manufacturer Part Number: PESD3V3U1UT,215
• Description: DIODE ULOW ESD PROTECTION SOT23
• Manufacturer: NXP Semiconductors

Specifications of PESD3V3U1UT,215

• Package / Case: SOT-23-3, TO-236-3, Micro3™, SSD3, SST3
• Voltage - Reverse Standoff (typ): 3.3V
• Voltage - Breakdown: 5.8V
• Power (watts): 80W
• Polarization: Unidirectional
• Mounting Type: Surface Mount
• Polarity: Unidirectional
• Clamping Voltage: 9 V
• Operating Voltage: 3.3 V
• Breakdown Voltage: 6.4 V
• Termination Style: SMD/SMT
• Peak Surge Current: 5 A
• Peak Pulse Power Dissipation: 80 W
• Capacitance: 0.6 pF
• Maximum Operating Temperature: + 150 C
• Minimum Operating Temperature: - 65 C
• Dimensions: 1.4 mm W x 3 mm L x 1.1 mm H
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 568-4047-2; 934059101215; PESD3V3U1UT T/R; PESD3V3U1UT T/R

NXP Semiconductors
PESDXU1UT_SER_2
Product data sheet
Circuit board layout and protection device placement
Circuit board layout is critical for the suppression of ESD, Electrical Fast Transient (EFT)
and surge transients. The following guidelines are recommended:
1. Place the PESDxU1UT as close to the input terminal or connector as possible.
2. The path length between the PESDxU1UT and the protected line should be
3. Keep parallel signal paths to a minimum.
4. Avoid running protected conductors in parallel with unprotected conductors.
5. Minimize all printed-circuit board conductive loops including power and ground loops.
6. Minimize the length of the transient return path to ground.
7. Avoid using shared transient return paths to a common ground point.
8. Ground planes should be used whenever possible. For multilayer printed-circuit
minimized.
boards, use ground vias.
Rev. 02 — 20 August 2009
Ultra low capacitance ESD protection diode in SOT23 package
PESDxU1UT series
© NXP B.V. 2009. All rights reserved.
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