PIC24F04KA201-I/SS Microchip Technology, PIC24F04KA201-I/SS Datasheet - Page 173

• Manufacturer Part Number: PIC24F04KA201-I/SS
• Description: IC PIC MCU FLASH 512KX4 20-SSOP
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 24Fr

Specifications of PIC24F04KA201-I/SS

• Core Size: 16-Bit
• Program Memory Size: 4KB (1.375K x 24)
• Peripherals: Brown-out Detect/Reset, HLVD, POR, PWM, WDT
• Core Processor: PIC
• Speed: 32MHz
• Connectivity: I²C, IrDA, SPI, UART/USART
• Number Of I /o: 18
• Program Memory Type: FLASH
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Data Converters: A/D 9x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-SSOP
• Controller Family/series: PIC24
• No. Of I/o's: 18
• Ram Memory Size: 512Byte
• Cpu Speed: 32MHz
• No. Of Timers: 3
• Processor Series: PIC24F
• Core: PIC
• Data Bus Width: 16 bit
• Data Ram Size: 512 B
• Interface Type: I2C, SPI, UART
• Maximum Clock Frequency: 32 KHz
• Number Of Programmable I/os: 12
• Number Of Timers: 3
• Operating Supply Voltage: 1.8 V to 3.6 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52713-733, 52714-737, 53276-922, EWDSPIC
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, DM240001
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 9 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

23.3
In PIC24F04KA201 family devices, in addition to the
WDT module, a DSWDT module is present which runs
while the device is in Deep Sleep, if enabled. It is
driven by either the SOSC or LPRC oscillator. The
clock source is selected by the Configuration bit,
DSWCKSEL (FDS<4>).
The DSWDT can be configured to generate a time-out at
2.1 ms to 25.7 days by selecting the respective
postscaler. The postscaler can be selected by the
Configuration bits, DSWDTPS<3:0> (FDS<3:0>). When
the DSWDT is enabled, the clock source is also enabled.
DSWDT is one of the sources that can wake-up the
device from Deep Sleep mode.
23.4
For all devices in the PIC24F04KA201 family, code
protection for the general segment is controlled by the
Configuration bit, GSS0. This bit inhibits external reads
and writes to the program memory space; this has no
direct effect in normal execution mode.
© 2009 Microchip Technology Inc.
Deep Sleep Watchdog Timer
(DSWDT)
Program Verification and
Code Protection
Preliminary
PIC24F04KA201 FAMILY
Write protection is controlled by the GWRP bit for the
general segment in the Configuration Word. When this
bit is programmed to ‘0’, internal write and erase
operations to program memory are blocked.
23.5
PIC24F04KA201 family microcontrollers can be
serially programmed while in the end application circuit.
This is simply done with two lines for clock (PGCx) and
data (PGDx) and three other lines for power, ground
and the programming voltage. This allows customers to
manufacture boards with unprogrammed devices and
then program the microcontroller just before shipping
the product. This also allows the most recent firmware
or a custom firmware to be programmed.
In-Circuit Serial Programming
DS39937B-page 171