PIC24F04KA201-I/SS Microchip Technology, PIC24F04KA201-I/SS Datasheet - Page 59

• Manufacturer Part Number: PIC24F04KA201-I/SS
• Description: IC PIC MCU FLASH 512KX4 20-SSOP
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 24Fr

Specifications of PIC24F04KA201-I/SS

• Core Size: 16-Bit
• Program Memory Size: 4KB (1.375K x 24)
• Peripherals: Brown-out Detect/Reset, HLVD, POR, PWM, WDT
• Core Processor: PIC
• Speed: 32MHz
• Connectivity: I²C, IrDA, SPI, UART/USART
• Number Of I /o: 18
• Program Memory Type: FLASH
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Data Converters: A/D 9x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-SSOP
• Controller Family/series: PIC24
• No. Of I/o's: 18
• Ram Memory Size: 512Byte
• Cpu Speed: 32MHz
• No. Of Timers: 3
• Processor Series: PIC24F
• Core: PIC
• Data Bus Width: 16 bit
• Data Ram Size: 512 B
• Interface Type: I2C, SPI, UART
• Maximum Clock Frequency: 32 KHz
• Number Of Programmable I/os: 12
• Number Of Timers: 3
• Operating Supply Voltage: 1.8 V to 3.6 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52713-733, 52714-737, 53276-922, EWDSPIC
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, DM240001
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 9 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

7.0
The PIC24F interrupt controller reduces the numerous
peripheral interrupt request signals to a single interrupt
request signal to the CPU. It has the following features:
• Up to eight processor exceptions and
• Seven user-selectable priority levels
• Interrupt Vector Table (IVT) with up to 118 vectors
• Unique vector for each interrupt or exception
• Fixed priority within a specified user priority level
• Fixed interrupt entry and return latencies
7.1
The IVT is displayed in Figure 7-1. The IVT resides in
the program memory, starting at location 000004h. The
IVT contains 126 vectors, consisting of eight
non-maskable trap vectors, plus, up to 118 sources of
interrupt. In general, each interrupt source has its own
FIGURE 7-1:
© 2009 Microchip Technology Inc.
Note:
software traps
source
Note 1: See Table 7-2 for the interrupt vector list.
INTERRUPT CONTROLLER
Interrupt Vector (IVT) Table
This data sheet summarizes the features
of this group of PIC24F devices. It is not
intended to be a comprehensive reference
source. For more information on the
Interrupt Controller, refer to the “PIC24F
Family Reference Manual”, Section 8.
“Interrupts” (DS39707).
PIC24F INTERRUPT VECTOR TABLE
Address Error Trap Vector
Oscillator Fail Trap Vector
Reset – GOTO Instruction
Stack Error Trap Vector
Math Error Trap Vector
Reset – GOTO Address
Interrupt Vector 116
Interrupt Vector 117
Interrupt Vector 52
Interrupt Vector 53
Interrupt Vector 54
Interrupt Vector 0
Interrupt Vector 1
Reserved
Reserved
Reserved
Reserved
—
—
—
—
—
—
Preliminary
PIC24F04KA201 FAMILY
000000h
000002h
000004h
000014h
00007Ch
00007Eh
000080h
0000FCh
0000FEh
vector. Each interrupt vector contains a 24-bit wide
address. The value programmed into each interrupt
vector location is the starting address of the associated
Interrupt Service Routine (ISR).
Interrupt vectors are prioritized in terms of their natural
priority; this is linked to their position in the vector table.
All other things being equal, lower addresses have a
higher natural priority. For example, the interrupt
associated with vector 0 will take priority over interrupts
at any other vector address.
PIC24F04KA201
non-maskable traps and unique interrupts; these are
summarized in Table 7-1 and Table 7-2.
7.2
A device Reset is not a true exception because the
interrupt controller is not involved in the Reset process.
The PIC24F devices clear their registers in response to
a Reset, which forces the Program Counter (PC) to
zero. The microcontroller then begins program execu-
tion at location 000000h. The user programs a GOTO
instruction at the Reset address, which redirects the
program execution to the appropriate start-up routine.
Note:
Interrupt Vector Table (IVT)
Reset Sequence
Any unimplemented or unused vector
locations
programmed with the address of a default
interrupt handler routine that contains a
RESET instruction.
family
in
the
devices
(1)
IVT
DS39937B-page 57
should
implement
be