PIC24F04KA201-I/SS Microchip Technology, PIC24F04KA201-I/SS Datasheet - Page 80

IC PIC MCU FLASH 512KX4 20-SSOP

PIC24F04KA201-I/SS

Manufacturer Part Number
PIC24F04KA201-I/SS
Description
IC PIC MCU FLASH 512KX4 20-SSOP
Manufacturer
Microchip Technology
Series
PIC® XLP™ 24Fr

Specifications of PIC24F04KA201-I/SS

Core Size
16-Bit
Program Memory Size
4KB (1.375K x 24)
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Core Processor
PIC
Speed
32MHz
Connectivity
I²C, IrDA, SPI, UART/USART
Number Of I /o
18
Program Memory Type
FLASH
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 9x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-SSOP
Controller Family/series
PIC24
No. Of I/o's
18
Ram Memory Size
512Byte
Cpu Speed
32MHz
No. Of Timers
3
Processor Series
PIC24F
Core
PIC
Data Bus Width
16 bit
Data Ram Size
512 B
Interface Type
I2C, SPI, UART
Maximum Clock Frequency
32 KHz
Number Of Programmable I/os
12
Number Of Timers
3
Operating Supply Voltage
1.8 V to 3.6 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52713-733, 52714-737, 53276-922, EWDSPIC
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, DM240001
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 9 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details
PIC24F04KA201 FAMILY
REGISTER 7-19:
REGISTER 7-20:
DS39937B-page 78
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15-3
bit 2-0
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15-7
bit 6-4
bit 3-0
U-0
U-0
U-0
U-0
Unimplemented: Read as ‘0’
HLVDIP<2:0>: High/Low-Voltage Detect Interrupt Priority bits
111 = Interrupt is priority 7 (highest priority interrupt)
001 = Interrupt is priority 1
000 = Interrupt source is disabled
Unimplemented: Read as ‘0’
CTMUIP<2:0>: CTMU Interrupt Priority bits
111 = Interrupt is priority 7 (highest priority interrupt)
001 = Interrupt is priority 1
000 = Interrupt source is disabled
Unimplemented: Read as ‘0’
CTMUIP2
R/W-1
U-0
U-0
U-0
IPC18: INTERRUPT PRIORITY CONTROL REGISTER 18
IPC19: INTERRUPT PRIORITY CONTROL REGISTER 19
W = Writable bit
‘1’ = Bit is set
W = Writable bit
‘1’ = Bit is set
CTMUIP1
R/W-0
U-0
U-0
U-0
CTMUIP0
R/W-0
U-0
U-0
U-0
Preliminary
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U-0
U-0
U-0
U-0
HLVDIP2
R/W-1
U-0
U-0
U-0
© 2009 Microchip Technology Inc.
x = Bit is unknown
x = Bit is unknown
HLVDIP1
R/W-0
U-0
U-0
U-0
HLVDIP0
R/W-0
U-0
U-0
U-0
bit 8
bit 0
bit 8
bit 0

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