AT89LP2052-20SU Atmel, AT89LP2052-20SU Datasheet - Page 68
![IC 8051 MCU FLASH 2K 20SOIC](/photos/6/80/68042/453-20-soic_sml.jpg)
AT89LP2052-20SU
Manufacturer Part Number
AT89LP2052-20SU
Description
IC 8051 MCU FLASH 2K 20SOIC
Manufacturer
Atmel
Series
89LPr
Datasheet
1.AT89LP2052-20PU.pdf
(94 pages)
Specifications of AT89LP2052-20SU
Core Processor
8051
Core Size
8-Bit
Speed
20MHz
Connectivity
SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
15
Program Memory Size
2KB (2K x 8)
Program Memory Type
FLASH
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
2.4 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
20-SOIC (7.5mm Width)
Processor Series
AT89x
Core
8051
Data Bus Width
8 bit
Data Ram Size
256 B
Interface Type
UART, SPI
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
15
Number Of Timers
2
Operating Supply Voltage
2.4 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Development Tools By Supplier
AT89ISP
Minimum Operating Temperature
- 40 C
Package
20SOIC W
Device Core
8051
Family Name
AT89
Maximum Speed
20 MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Lead Free Status / Rohs Status
Details
23.4.10
68
AT89LP2052/LP4052
Read Atmel Signature Page
Function:
Usage:
Figure 23-14. Read Atmel Signature Page Sequence
Note:
• Read 1 to 32 bytes of data from the Atmel Signature Row.
• The byte address (offset in page) is initialized to bits [4:0] of the low address byte. The
• Read data will be output on P1 after the falling edge of fourth XTAL1 pulse (address low byte
1. Bring CS (P3.2) low.
2. Drive P1 to AAh and pulse XTAL1 high.
3. Drive P1 to 38h and pulse XTAL1 high.
4. Drive P1 to 00h and pulse XTAL1 high.
5. Drive P1 with bits [4:0] of address and bring XTAL1 high.
6. Tri-state P1.
7. Bring XTAL1 low.
8. Read data from P1.
9. To read additional data bytes in the page, pulse XTAL1 high to increment to the next
10. Drive CS high.
internal address is incremented by one on the negative edge of the XTAL1 pulse. The
address will wrap around to the 1st byte of the page when incremented past 31.
strobe). The programmer should tri-state P1 prior to this edge to avoid bus contention on P1.
XTAL1
address.
CS
P1
The waveform on this page is not to scale.
AAh
38h
00h
000bbbbb
DOUT 0
DOUT 1
3547J–MICRO–10/09
DOUTn