PIC18F46K20-I/PT Microchip Technology, PIC18F46K20-I/PT Datasheet - Page 11

IC PIC MCU FLASH 32KX16 44-TQFP

PIC18F46K20-I/PT

Manufacturer Part Number
PIC18F46K20-I/PT
Description
IC PIC MCU FLASH 32KX16 44-TQFP
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr

Specifications of PIC18F46K20-I/PT

Program Memory Type
FLASH
Program Memory Size
64KB (32K x 16)
Package / Case
44-TQFP, 44-VQFP
Core Processor
PIC
Core Size
8-Bit
Speed
64MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
35
Eeprom Size
1K x 8
Ram Size
3.8K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 14x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
3936 B
Interface Type
CCP, ECCP, EUSART, I2C, MSSP, SPI
Maximum Clock Frequency
64 MHz
Number Of Programmable I/os
36
Number Of Timers
4
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DV164136
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 14 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC164112 - VOLTAGE LIMITER MPLAB ICD2 VPPDM164124 - KIT STARTER FOR PIC18F4XK20AC164305 - MODULE SKT FOR PM3 44TQFP
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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0
2.6
When the LVP Configuration bit is ‘1’ (see Section 5.3
“Single-Supply ICSP Programming”), the Low-
Voltage ICSP mode is enabled. As shown in Figure 2-14,
Low-Voltage ICSP Program/Verify mode is entered by
holding PGC and PGD low, placing a logic high on PGM
and then raising MCLR/V
RB5/PGM pin is dedicated to the programming function
and ceases to be a general purpose I/O pin. Figure 2-15
shows the exit sequence.
The sequence that enters the device into the Program/
Verify mode places all unused I/Os in the high-impedance
state.
FIGURE 2-14:
FIGURE 2-15:
© 2009 Microchip Technology Inc.
MCLR/V
V
PGM
PGD
PGC
DD
MCLR/V
V
PGM
PGD
PGC
DD
Entering and Exiting Low-Voltage
ICSP Program/Verify Mode
PP
V
/RE3
PP
IH
/RE3
V
PGD = Input
PGD = Input
IH
P15
ENTERING LOW-VOLTAGE
PROGRAM/VERIFY MODE
EXITING LOW-VOLTAGE
PROGRAM/VERIFY MODE
PP
/RE3 to V
V
P16
IH
P12
V
IH
P18
IH
. In this mode, the
Advance Information
2.7
The PGC pin is used as a clock input pin and the PGD
pin is used for entering command bits and data input/
output during serial operation. Commands and data are
transmitted on the rising edge of PGC, latched on the
falling edge of PGC and are Least Significant bit (LSb)
first.
2.7.1
All instructions are 20 bits, consisting of a leading 4-bit
command followed by a 16-bit operand, which depends
on the type of command being executed. To input a
command, PGC is cycled four times. The commands
needed for programming and verification are shown in
Table 2-6.
Depending on the 4-bit command, the 16-bit operand
represents 16 bits of input data or 8 bits of input data
and 8 bits of output data.
Throughout this specification, commands and data are
presented as illustrated in Table 2-7. The 4-bit com-
mand is shown Most Significant bit (MSb) first. The
command operand, or “Data Payload”, is shown
<MSB><LSB>. Figure 2-16 demonstrates how to
serially present a 20-bit command/operand to the
device.
2.7.2
The core instruction passes a 16-bit instruction to the
CPU core for execution. This is needed to set up
registers as appropriate for use with other commands.
TABLE 2-6:
PIC18F2XK20/4XK20
Core Instruction
(Shift in16-bit instruction)
Shift out TABLAT register
Table Read
Table Read, post-increment
Table Read, post-decrement
Table Read, pre-increment
Table Write
Table Write, post-increment by 2
Table Write, start programming,
post-increment by 2
Table Write, start programming
Serial Program/Verify Operation
4-BIT COMMANDS
CORE INSTRUCTION
Description
COMMANDS FOR
PROGRAMMING
DS41297F-page 11
Command
0000
0010
1000
1001
1010
1011
1100
1101
1110
1111
4-Bit

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