PIC18F46K20-I/PT Microchip Technology, PIC18F46K20-I/PT Datasheet - Page 15

• Manufacturer Part Number: PIC18F46K20-I/PT
• Description: IC PIC MCU FLASH 32KX16 44-TQFP
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 18Fr

Specifications of PIC18F46K20-I/PT

• Program Memory Type: FLASH
• Program Memory Size: 64KB (32K x 16)
• Package / Case: 44-TQFP, 44-VQFP
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 64MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, HLVD, POR, PWM, WDT
• Number Of I /o: 35
• Eeprom Size: 1K x 8
• Ram Size: 3.8K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Data Converters: A/D 14x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 3936 B
• Interface Type: CCP, ECCP, EUSART, I2C, MSSP, SPI
• Maximum Clock Frequency: 64 MHz
• Number Of Programmable I/os: 36
• Number Of Timers: 4
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, DV164136
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 14 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC164112 - VOLTAGE LIMITER MPLAB ICD2 VPPDM164124 - KIT STARTER FOR PIC18F4XK20AC164305 - MODULE SKT FOR PM3 44TQFP
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

TABLE 3-3:
© 2009 Microchip Technology Inc.
Step 1: Direct access to code memory and enable writes.
Step 2: Point to first row in code memory.
Step 3: Enable erase and erase single row.
Step 4: Poll WR bit. Repeat until bit is clear.
Step 5: Hold PGC low for time P10.
Step 6: Repeat step 3 with Address Pointer incremented by 64 until all rows are erased.
Step 7: Disable writes.
Note 1:
Command
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0010
0000
4-bit
See Figure 4-4 for details on shift out data timing.
ERASE CODE MEMORY CODE SEQUENCE
<MSB><LSB>
Data Payload
9C A6
8E A6
6A F8
6A F7
6A F6
6E F5
84 A6
88 A6
82 A6
00 00
00 00
50 A6
00 00
94 A6
BSF
BCF
BSF
CLRF
CLRF
CLRF
BSF
BSF
NOP
NOP
MOVF EECON1, W, 0
MOVWF TABLAT
NOP
Shift out data
BCF EECON1, WREN
Advance Information
EECON1, EEPGD
EECON1, CFGS
EECON1, WREN
TBLPTRU
TBLPTRH
TBLPTRL
EECON1, FREE
EECON1, WR
Erase starts on the 4th clock of this instruction
(1)
PIC18F2XK20/4XK20
Core Instruction
DS41297F-page 15