AT90PWM3B-16SU Atmel, AT90PWM3B-16SU Datasheet - Page 100

IC MCU AVR RISC 8K FLASH 32-SOIC

AT90PWM3B-16SU

Manufacturer Part Number
AT90PWM3B-16SU
Description
IC MCU AVR RISC 8K FLASH 32-SOIC
Manufacturer
Atmel
Series
AVR® 90PWM Lightingr
Datasheets

Specifications of AT90PWM3B-16SU

Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
27
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 11x10b; D/A 1x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C
Package / Case
32-SOIC (7.5mm Width)
Processor Series
AT90PWMx
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
512 B
Interface Type
SPI/USART
Maximum Clock Frequency
16 MHz
Number Of Programmable I/os
27
Number Of Timers
2
Operating Supply Voltage
2.7 V to 5.5 V
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT, ATAVRFBKIT, ATAVRISP2
Minimum Operating Temperature
- 40 C
On-chip Adc
11-ch x 10-bit
On-chip Dac
1-chx10-bit
Controller Family/series
AVR PWM
Eeprom Memory Size
512Byte
Ram Memory Size
512Byte
Cpu Speed
16MHz
Rohs Compliant
Yes
For Use With
ATSTK600-SOIC - STK600 SOCKET/ADAPTER FOR SOIC770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAGATAVRMC200 - KIT EVAL FOR AT90PWM3 ASYNCATAVRFBKIT - KIT DEMO BALLAST FOR AT90PWM2ATAVRISP2 - PROGRAMMER AVR IN SYSTEMATSTK520 - ADAPTER KIT FOR 90PWM
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AT90PWM3B-16SU
Manufacturer:
Atmel
Quantity:
4 000
Part Number:
AT90PWM3B-16SU
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
14.8.5
14.8.6
14.8.7
100
AT90PWM2/3/2B/3B
Output Compare Register B – OCR0B
Timer/Counter Interrupt Mask Register – TIMSK0
Timer/Counter 0 Interrupt Flag Register – TIFR0
The Output Compare Register B contains an 8-bit value that is continuously compared with the
counter value (TCNT0). A match can be used to generate an Output Compare interrupt, or to
generate a waveform output on the OC0B pin.
• Bits 7..3 – Res: Reserved Bits
These bits are reserved bits in the AT90PWM2/2B/3/3B and will always read as zero.
• Bit 2 – OCIE0B: Timer/Counter Output Compare Match B Interrupt Enable
When the OCIE0B bit is written to one, and the I-bit in the Status Register is set, the
Timer/Counter Compare Match B interrupt is enabled. The corresponding interrupt is executed if
a Compare Match in Timer/Counter occurs, i.e., when the OCF0B bit is set in the Timer/Counter
Interrupt Flag Register – TIFR0.
• Bit 1 – OCIE0A: Timer/Counter0 Output Compare Match A Interrupt Enable
When the OCIE0A bit is written to one, and the I-bit in the Status Register is set, the
Timer/Counter0 Compare Match A interrupt is enabled. The corresponding interrupt is executed
if a Compare Match in Timer/Counter0 occurs, i.e., when the OCF0A bit is set in the
Timer/Counter 0 Interrupt Flag Register – TIFR0.
• Bit 0 – TOIE0: Timer/Counter0 Overflow Interrupt Enable
When the TOIE0 bit is written to one, and the I-bit in the Status Register is set, the
Timer/Counter0 Overflow interrupt is enabled. The corresponding interrupt is executed if an
overflow in Timer/Counter0 occurs, i.e., when the TOV0 bit is set in the Timer/Counter 0 Inter-
rupt Flag Register – TIFR0.
• Bits 7..3 – Res: Reserved Bits
These bits are reserved bits in the AT90PWM2/2B/3/3B and will always read as zero.
• Bit 2 – OCF0B: Timer/Counter 0 Output Compare B Match Flag
The OCF0B bit is set when a Compare Match occurs between the Timer/Counter and the data in
OCR0B – Output Compare Register0 B. OCF0B is cleared by hardware when executing the cor-
responding interrupt handling vector. Alternatively, OCF0B is cleared by writing a logic one to
the flag. When the I-bit in SREG, OCIE0B (Timer/Counter Compare B Match Interrupt Enable),
and OCF0B are set, the Timer/Counter Compare Match Interrupt is executed.
• Bit 1 – OCF0A: Timer/Counter 0 Output Compare A Match Flag
Bit
Read/Write
Initial Value
Bit
Read/Write
Initial Value
Bit
Read/Write
Initial Value
R/W
R
7
0
R
7
0
7
0
R/W
R
6
0
R
6
0
6
0
R/W
5
R
0
R
5
0
5
0
R/W
R
4
0
R
4
0
4
0
OCR0B[7:0]
R/W
3
R
0
R
3
0
3
0
OCIE0B
OCF0B
R/W
R/W
R/W
2
0
2
0
2
0
OCIE0A
OCF0A
R/W
R/W
R/W
1
0
1
0
1
0
TOIE0
TOV0
R/W
R/W
R/W
0
0
0
0
0
0
4317J–AVR–08/10
OCR0B
TIMSK0
TIFR0

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