AT90PWM3B-16SU Atmel, AT90PWM3B-16SU Datasheet - Page 211

• Manufacturer Part Number: AT90PWM3B-16SU
• Description: IC MCU AVR RISC 8K FLASH 32-SOIC
• Manufacturer: Atmel
• Series: AVR® 90PWM Lightingr

Specifications of AT90PWM3B-16SU

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 27
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 11x10b; D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 32-SOIC (7.5mm Width)
• Processor Series: AT90PWMx
• Core: AVR8
• Data Bus Width: 8 bit
• Data Ram Size: 512 B
• Interface Type: SPI/USART
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 27
• Number Of Timers: 2
• Operating Supply Voltage: 2.7 V to 5.5 V
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT, ATAVRFBKIT, ATAVRISP2
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 11-ch x 10-bit
• On-chip Dac: 1-chx10-bit
• Controller Family/series: AVR PWM
• Eeprom Memory Size: 512Byte
• Ram Memory Size: 512Byte
• Cpu Speed: 16MHz
• Rohs Compliant: Yes
• For Use With: ATSTK600-SOIC - STK600 SOCKET/ADAPTER FOR SOIC770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAGATAVRMC200 - KIT EVAL FOR AT90PWM3 ASYNCATAVRFBKIT - KIT DEMO BALLAST FOR AT90PWM2ATAVRISP2 - PROGRAMMER AVR IN SYSTEMATSTK520 - ADAPTER KIT FOR 90PWM
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

19.3
19.3.1
4317J–AVR–08/10
Serial Frames
Frame Formats
•
•
A serial frame is defined to be one character of data bits with synchronization bits (start and stop
bits), and optionally a parity bit for error checking.
The EUSART allows to receive and transmit serial frame with the following format:
•
•
•
•
•
•
Asynchonous frames
–
–
Synchronous frames
–
1 start bit
5, 6, 7, 8, 9, 13, 14,15,16,17 data bits
data bits and start bit level encoded or Manchester encoded
data transmition MSB or LSB first (bit ordering)
no, even or odd parity bit
1 or 2 stop bits:
–
–
Standard bit level encoded
Manchester bit encoded
In this mode only the Standard bit level encoded is available
Stop bits insertion for transmition
Stop bits value read access in reception
(Transmit)
TRANSMIT SHIFT REGISTER
(Receive)
RECEIVE SHIFT REGISTER
EUDR
BAUD RATE GENERATOR
EUDR
UBRR[H:L]
EUCSRA
UCSRA
(Transmit)
(Receive)
UDR
UDR
GENERATOR
SYNC LOGIC
RECOVERY
RECOVERY
CHECKER
PARITY
CLOCK
PARITY
DATA
CLKio
EUCSRB
UCSRB
AT90PWM2/3/2B/3B
MANCHESTER
MANCHESTER
ENCODER
DECODER
CONTROL
EUCSRC
UCSRC
PIN
CONTROL
CONTROL
CONTROL
CONTROL
Transmitter
Clock Generator
PIN
PIN
TX
RX
Receiver
XCK
RxD
TxD
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