DSPIC30F3013-20I/SO Microchip Technology, DSPIC30F3013-20I/SO Datasheet - Page 197

• Manufacturer Part Number: DSPIC30F3013-20I/SO
• Description: IC DSPIC MCU/DSP 24K 28SOIC
• Manufacturer: Microchip Technology
• Series: dsPIC™ 30Fr

Specifications of DSPIC30F3013-20I/SO

• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 20 MIPS
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 20
• Program Memory Size: 24KB (8K x 24)
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 5.5 V
• Data Converters: A/D 10x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-SOIC (7.5mm Width)
• Core Frequency: 40MHz
• Core Supply Voltage: 5.5V
• Embedded Interface Type: I2C, SPI, UART
• No. Of I/o's: 20
• Flash Memory Size: 24KB
• Supply Voltage Range: 2.5V To 5.5V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: XLT28SO-1 - SOCKET TRANSITION 28SOIC 300MIL
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: DSPIC30F301320ISO

INDEX
Numerics
12-bit Analog-to-Digital Converter (A/D) Module .............. 111
A
A/D .................................................................................... 111
AC Characteristics ............................................................ 157
AC Temperature and Voltage Specifications .................... 157
ADC
ADC Conversion Speeds .................................................. 114
Address Generator Units .................................................... 43
Alternate Vector Table ........................................................ 69
Analog-to-Digital Converter. See ADC.
Assembler
Automatic Clock Stretch...................................................... 98
B
Bandgap Start-up Time
Barrel Shifter ....................................................................... 27
Bit-Reversed Addressing .................................................... 46
Block Diagrams
© 2008 Microchip Technology Inc.
Aborting a Conversion .............................................. 113
ADCHS Register ....................................................... 111
ADCON1 Register..................................................... 111
ADCON2 Register..................................................... 111
ADCON3 Register..................................................... 111
ADCSSL Register ..................................................... 111
ADPCFG Register..................................................... 111
Configuring Analog Port Pins.............................. 60, 117
Connection Considerations....................................... 117
Conversion Operation ............................................... 112
Effects of a Reset...................................................... 116
Operation During CPU Idle Mode ............................. 116
Operation During CPU Sleep Mode.......................... 116
Output Formats ......................................................... 116
Power-Down Modes.................................................. 116
Programming the Sample Trigger............................. 113
Register Map............................................................. 119
Result Buffer ............................................................. 112
Sampling Requirements............................................ 115
Selecting the Conversion Sequence......................... 112
Load Conditions ........................................................ 157
Selecting the Conversion Clock ................................ 113
MPASM Assembler................................................... 144
During 10-bit Addressing (STREN = 1)....................... 98
During 7-bit Addressing (STREN = 1)......................... 98
Receive Mode ............................................................. 98
Transmit Mode ............................................................ 98
Requirements............................................................ 164
Timing Characteristics .............................................. 164
Example ...................................................................... 47
Implementation ........................................................... 46
Modifier Values Table ................................................. 47
Sequence Table (16-Entry)......................................... 47
12-bit ADC Functional............................................... 111
16-bit Timer1 Module .................................................. 73
16-bit Timer2............................................................... 79
16-bit Timer3............................................................... 79
32-bit Timer2/3............................................................ 78
DSP Engine ................................................................ 24
dsPIC30F2011 ............................................................ 12
dsPIC30F2012 ............................................................ 13
dsPIC30F3013 ............................................................ 15
External Power-on Reset Circuit............................... 129
dsPIC30F2011/2012/3012/3013
BOR Characteristics ......................................................... 155
BOR. See Brown-out Reset.
Brown-out Reset
C
C Compilers
CAN Module
CLKOUT and I/O Timing
Code Examples
Code Protection ................................................................ 121
Control Registers ................................................................ 50
Core Architecture
CPU Architecture Overview ................................................ 19
Customer Change Notification Service............................. 200
Customer Notification Service .......................................... 200
Customer Support............................................................. 200
D
Data Accumulators and Adder/Subtractor .......................... 25
Data Address Space........................................................... 35
Data EEPROM Memory...................................................... 55
I
Input Capture Mode.................................................... 83
Oscillator System...................................................... 123
Output Compare Mode ............................................... 87
Reset System ........................................................... 127
Shared Port Structure................................................. 59
SPI.............................................................................. 91
SPI Master/Slave Connection..................................... 92
UART Receiver......................................................... 104
UART Transmitter..................................................... 103
Characteristics.......................................................... 155
Timing Requirements ............................................... 163
MPLAB C18.............................................................. 144
MPLAB C30.............................................................. 144
I/O Timing Characteristics ........................................ 179
I/O Timing Requirements.......................................... 179
Characteristics.......................................................... 162
Requirements ........................................................... 162
Data EEPROM Block Erase ....................................... 56
Data EEPROM Block Write ........................................ 58
Data EEPROM Read.................................................. 55
Data EEPROM Word Erase ....................................... 56
Data EEPROM Word Write ........................................ 57
Erasing a Row of Program Memory ........................... 51
Initiating a Programming Sequence ........................... 52
Loading Write Latches................................................ 52
NVMADR .................................................................... 50
NVMADRU ................................................................. 50
NVMCON.................................................................... 50
NVMKEY .................................................................... 50
Overview..................................................................... 19
Data Space Write Saturation ...................................... 27
Overflow and Saturation ............................................. 25
Round Logic ............................................................... 26
Write-Back .................................................................. 26
Alignment.................................................................... 38
Alignment (Figure) ...................................................... 38
Effect of Invalid Memory Accesses (Table) ................ 38
MCU and DSP (MAC Class) Instructions Example .... 37
Memory Map......................................................... 35, 36
Near Data Space ........................................................ 39
Software Stack ........................................................... 39
Spaces........................................................................ 38
Width .......................................................................... 38
Erasing ....................................................................... 56
2
C .............................................................................. 96
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