ATMEGA32A-AU Atmel, ATMEGA32A-AU Datasheet - Page 135
![MCU AVR 32K FLASH 16MHZ 44-TQFP](/photos/6/70/67042/313-44-tqfp_sml.jpg)
ATMEGA32A-AU
Manufacturer Part Number
ATMEGA32A-AU
Description
MCU AVR 32K FLASH 16MHZ 44-TQFP
Manufacturer
Atmel
Series
AVR® ATmegar
Specifications of ATMEGA32A-AU
Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
32
Program Memory Size
32KB (16K x 16)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-TQFP, 44-VQFP
Processor Series
ATMEGA32x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
2 KB
Interface Type
2-Wire/SPI/USART
Maximum Clock Frequency
16 MHz
Number Of Programmable I/os
32
Number Of Timers
3
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 10-bit
Data Rom Size
1024 B
Height
1 mm
Length
10 mm
Supply Voltage (max)
5.5 V
Supply Voltage (min)
2.7 V
Width
10 mm
Controller Family/series
AVR MEGA
No. Of I/o's
32
Eeprom Memory Size
1KB
Ram Memory Size
2KB
Cpu Speed
16MHz
Rohs Compliant
Yes
For Use With
ATSTK524 - KIT STARTER ATMEGA32M1/MEGA32C1ATSTK600 - DEV KIT FOR AVR/AVR32ATAVRDRAGON - KIT DRAGON 32KB FLASH MEM AVRATSTK500 - PROGRAMMER AVR STARTER KIT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ATMEGA32A-AU
Manufacturer:
ATMEL
Quantity:
5 600
Part Number:
ATMEGA32A-AU
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
Company:
Part Number:
ATMEGA32A-AUR
Manufacturer:
SMD
Quantity:
5
- Current page: 135 of 353
- Download datasheet (6Mb)
17.11.2
17.11.3
17.11.4
8155C–AVR–02/11
TCNT2 – Timer/Counter Register
OCR2 – Output Compare Register
‘ASSR – Asynchronous Status Register
The Timer/Counter Register gives direct access, both for read and write operations, to the
Timer/Counter unit 8-bit counter. Writing to the TCNT2 Register blocks (removes) the compare
match on the following timer clock. Modifying the counter (TCNT2) while the counter is running,
introduces a risk of missing a compare match between TCNT2 and the OCR2 Register.
The Output Compare Register contains an 8-bit value that is continuously compared with the
counter value (TCNT2). A match can be used to generate an output compare interrupt, or to
generate a waveform output on the OC2 pin.
• Bit 3 – AS2: Asynchronous Timer/Counter2
When AS2 is written to zero, Timer/Counter 2 is clocked from the I/O clock, clk
written to one, Timer/Counter2 is clocked from a Crystal Oscillator connected to the Timer Oscil-
lator 1 (TOSC1) pin. When the value of AS2 is changed, the contents of TCNT2, OCR2, and
TCCR2 might be corrupted.
• Bit 2 – TCN2UB: Timer/Counter2 Update Busy
When Timer/Counter2 operates asynchronously and TCNT2 is written, this bit becomes set.
When TCNT2 has been updated from the temporary storage register, this bit is cleared by hard-
ware. A logical zero in this bit indicates that TCNT2 is ready to be updated with a new value.
• Bit 1 – OCR2UB: Output Compare Register2 Update Busy
When Timer/Counter2 operates asynchronously and OCR2 is written, this bit becomes set.
When OCR2 has been updated from the temporary storage register, this bit is cleared by hard-
ware. A logical zero in this bit indicates that OCR2 is ready to be updated with a new value.
• Bit 0 – TCR2UB: Timer/Counter Control Register2 Update Busy
When Timer/Counter2 operates asynchronously and TCCR2 is written, this bit becomes set.
When TCCR2 has been updated from the temporary storage register, this bit is cleared by hard-
ware. A logical zero in this bit indicates that TCCR2 is ready to be updated with a new value.
If a write is performed to any of the three Timer/Counter2 Registers while its update busy flag is
set, the updated value might get corrupted and cause an unintentional interrupt to occur.
Bit
Read/Write
Initial Value
Bit
Read/Write
Initial Value
Bit
Read/Write
Initial Value
R/W
R/W
R
7
–
0
7
0
7
0
R
6
–
0
R/W
R/W
6
0
6
0
R
5
–
0
R/W
R/W
5
0
5
0
R
4
–
0
R/W
R/W
4
0
4
0
TCNT2[7:0]
OCR2[7:0]
AS2
R/W
3
0
R/W
R/W
3
0
3
0
TCN2UB
R
2
0
R/W
R/W
2
0
2
0
OCR2UB
R
1
0
R/W
R/W
1
0
1
0
ATmega32A
TCR2UB
I/O
R/W
0
R
0
R/W
0
0
0
0
. When AS2 is
TCNT2
ASSR
OCR2
135
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