PIC24FJ64GB002-I/SP Microchip Technology, PIC24FJ64GB002-I/SP Datasheet - Page 242
![IC MCU 16BIT 64KB FLASH 28DIP](/photos/6/59/65908/150-28-dip_sml.jpg)
PIC24FJ64GB002-I/SP
Manufacturer Part Number
PIC24FJ64GB002-I/SP
Description
IC MCU 16BIT 64KB FLASH 28DIP
Manufacturer
Microchip Technology
Series
PIC® XLP™ 24Fr
Datasheets
1.MCP73831T-2DCIOT.pdf
(28 pages)
2.PIC24FJ32GA102-ISP.pdf
(48 pages)
3.PIC24FJ32GB002-ISO.pdf
(352 pages)
4.PIC24FJ32GB002-ISO.pdf
(12 pages)
5.PIC24FJ32GB002-ISO.pdf
(342 pages)
Specifications of PIC24FJ64GB002-I/SP
Program Memory Type
FLASH
Program Memory Size
64KB (22K x 24)
Package / Case
28-DIP (0.300", 7.62mm)
Core Processor
PIC
Core Size
16-Bit
Speed
32MHz
Connectivity
I²C, IrDA, SPI, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
19
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 9x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC24FJ
Core
PIC
Data Bus Width
16 bit
Data Ram Size
8 KB
Interface Type
I2C/IrDA/SPI/UART
Maximum Clock Frequency
32 MHz
Number Of Programmable I/os
19
Number Of Timers
5
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
3rd Party Development Tools
52713-733, 52714-737, 53276-922, EWDSPIC
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DM240001, DM240011
Minimum Operating Temperature
- 40 C
On-chip Adc
9-ch x 10-bit
Controller Family/series
PIC24
Ram Memory Size
8KB
Cpu Speed
32MHz
No. Of Timers
5
Embedded Interface Type
I2C, LIN, SPI, UART, USB
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
- MCP73831T-2DCIOT PDF datasheet
- PIC24FJ32GA102-ISP PDF datasheet #2
- PIC24FJ32GB002-ISO PDF datasheet #3
- PIC24FJ32GB002-ISO PDF datasheet #4
- PIC24FJ32GB002-ISO PDF datasheet #5
- Current page: 242 of 352
- Download datasheet (3Mb)
PIC24FJ64GB004 FAMILY
20.2
The RTCC module registers are organized as three
categories:
• RTCC Control Registers
• RTCC Value Registers
• Alarm Value Registers
20.2.1
To limit the register interface, the RTCC Timer and
Alarm
corresponding register pointers. The RTCC Value
register window (RTCVALH and RTCVALL) uses the
RTCPTR bits (RCFGCAL<9:8>) to select the desired
Timer register pair (see Table 20-1).
By writing to the RTCVALH byte, the RTCC Pointer
value, RTCPTR<1:0> bits, decrements by one until
they reach ‘00’. After they reach ‘00’, the MINUTES
and SECONDS value will be accessible through
RTCVALH and RTCVALL until the pointer value is
manually changed.
TABLE 20-1:
The Alarm Value register window (ALRMVALH and
ALRMVALL)
(ALCFGRPT<9:8>) to select the desired Alarm register
pair (see Table 20-2).
By writing to the ALRMVALH byte, the Alarm Pointer
value, ALRMPTR<1:0> bits, decrements by one until
they reach ‘00’. Once they reach ‘00’, the ALRMMIN
and ALRMSEC value will be accessible through
ALRMVALH and ALRMVALL until the pointer value is
manually changed.
EXAMPLE 20-1:
DS39940D-page 242
RTCPTR<1:0>
asm volatile(“push w7”);
asm volatile(“push w8”);
asm volatile(“disi #5”);
asm volatile(“mov #0x55, w7”);
asm volatile(“mov w7, _NVMKEY”);
asm volatile(“mov #0xAA, w8”);
asm volatile(“mov w8, _NVMKEY”);
asm volatile(“bset _RCFGCAL, #13”);
asm volatile(“pop w8”);
asm volatile(“pop w7”);
00
01
10
11
Time
RTCC Module Registers
REGISTER MAPPING
registers
uses
RTCVAL<15:8>
RTCVAL REGISTER MAPPING
RTCC Value Register Window
WEEKDAY
MINUTES
MONTH
SETTING THE RTCWREN BIT
—
the
are
accessed
ALRMPTR
RTCVAL<7:0>
SECONDS
HOURS
YEAR
DAY
through
bits
//set the RTCWREN bit
TABLE 20-2:
Considering that the 16-bit core does not distinguish
between 8-bit and 16-bit read operations, the user must
be aware that when reading either the ALRMVALH or
ALRMVALL bytes, the ALRMPTR<1:0> value will be
decremented. The same applies to the RTCVALH or
RTCVALL bytes with the RTCPTR<1:0> being
decremented.
20.2.2
In order to perform a write to any of the RTCC Timer
registers, the RTCWREN bit (RCFGCAL<13>) must be
set (refer to Example 20-1).
20.2.3
The clock source for the RTCC module can be selected
using the Flash Configuration bit, RTCOSC (CW4<5>).
When the bit is set to ‘1’, the Secondary Oscillator
(SOSC) is used as the reference clock, and when the
bit is ‘0’, LPRC is used as the reference clock.
ALRMPTR
Note:
Note:
<1:0>
00
01
10
11
This only applies to read operations and
not write operations.
WRITE LOCK
To avoid accidental writes to the timer, it is
recommended that the RTCWREN bit
(RCFGCAL<13>) is kept clear at any
other time. For the RTCWREN bit to be
set, there is only one instruction cycle time
window allowed between the 55h/AA
sequence and the setting of RTCWREN;
therefore, it is recommended that code
follow the procedure in Example 20-1.
SELECTING RTCC CLOCK SOURCE
ALRMVAL<15:8> ALRMVAL<7:0>
ALRMVAL REGISTER
MAPPING
Alarm Value Register Window
ALRMMNTH
ALRMMIN
ALRMWD
2010 Microchip Technology Inc.
—
ALRMSEC
ALRMDAY
ALRMHR
—
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