PIC24FJ64GB002-I/SP Microchip Technology, PIC24FJ64GB002-I/SP Datasheet - Page 287
![IC MCU 16BIT 64KB FLASH 28DIP](/photos/6/59/65908/150-28-dip_sml.jpg)
PIC24FJ64GB002-I/SP
Manufacturer Part Number
PIC24FJ64GB002-I/SP
Description
IC MCU 16BIT 64KB FLASH 28DIP
Manufacturer
Microchip Technology
Series
PIC® XLP™ 24Fr
Datasheets
1.MCP73831T-2DCIOT.pdf
(28 pages)
2.PIC24FJ32GA102-ISP.pdf
(48 pages)
3.PIC24FJ32GB002-ISO.pdf
(352 pages)
4.PIC24FJ32GB002-ISO.pdf
(12 pages)
5.PIC24FJ32GB002-ISO.pdf
(342 pages)
Specifications of PIC24FJ64GB002-I/SP
Program Memory Type
FLASH
Program Memory Size
64KB (22K x 24)
Package / Case
28-DIP (0.300", 7.62mm)
Core Processor
PIC
Core Size
16-Bit
Speed
32MHz
Connectivity
I²C, IrDA, SPI, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
19
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 9x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC24FJ
Core
PIC
Data Bus Width
16 bit
Data Ram Size
8 KB
Interface Type
I2C/IrDA/SPI/UART
Maximum Clock Frequency
32 MHz
Number Of Programmable I/os
19
Number Of Timers
5
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
3rd Party Development Tools
52713-733, 52714-737, 53276-922, EWDSPIC
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DM240001, DM240011
Minimum Operating Temperature
- 40 C
On-chip Adc
9-ch x 10-bit
Controller Family/series
PIC24
Ram Memory Size
8KB
Cpu Speed
32MHz
No. Of Timers
5
Embedded Interface Type
I2C, LIN, SPI, UART, USB
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
- MCP73831T-2DCIOT PDF datasheet
- PIC24FJ32GA102-ISP PDF datasheet #2
- PIC24FJ32GB002-ISO PDF datasheet #3
- PIC24FJ32GB002-ISO PDF datasheet #4
- PIC24FJ32GB002-ISO PDF datasheet #5
- Current page: 287 of 352
- Download datasheet (3Mb)
26.2
All PIC24FJ64GB004 family devices power their core
digital logic at a nominal 2.5V. This may create an issue
for designs that are required to operate at a higher
typical voltage, such as 3.3V. To simplify system
design, all devices in the PIC24FJ64GB004 family
incorporate an on-chip regulator that allows the device
to run its core logic from V
The regulator is controlled by the DISVREG pin. Tying V
to the pin enables the regulator, which in turn, provides
power to the core from the other V
ulator is enabled, a low-ESR capacitor (such as ceramic)
must
(Figure 26-1). This helps to maintain the stability of the
regulator. The recommended value for the Filter Capacitor
(C
If DISVREG is tied to V
this case, separate power for the core logic, at a nomi-
nal 2.5V, must be supplied to the device on the
V
levels, typically 3.3V. Alternatively, the V
and V
nominal voltage. Refer to Figure 26-1 for possible
configurations.
26.2.1
When it is enabled, the on-chip regulator provides a
constant voltage of 2.5V nominal to the digital core
logic.
The regulator can provide this level from a V
2.5V, all the way up to the device’s V
have the capability to boost V
order to prevent “brown-out” conditions when the volt-
age drops too low for the regulator, the regulator enters
Tracking mode. In Tracking mode, the regulator output
follows V
When the device enters Tracking mode, it is no longer
possible to operate at full speed. To provide information
about when the device enters Tracking mode, the
on-chip regulator includes a simple, Low-Voltage
Detect circuit. When V
ating voltage, the circuit sets the Low-Voltage Detect
Interrupt Flag, LVDIF (IFS4<8>). This can be used to
generate an interrupt and put the application into a
Low-Power Operational mode or trigger an orderly
shutdown.
Low-Voltage Detection is only available when the
regulator is enabled.
2010 Microchip Technology Inc.
DDCORE
EFC
) is provided in Section 29.1 “DC Characteristics”.
DD
be
pins can be tied together to operate at a lower
On-Chip Voltage Regulator
DD
/V
CAP
VOLTAGE REGULATOR TRACKING
MODE AND LOW-VOLTAGE
DETECTION
connected
with a typical voltage drop of 100 mV.
pin to run the I/O pins at higher voltage
DD
DD
to
drops below full-speed oper-
, the regulator is disabled. In
DD
.
the
DD
DD
levels below 2.5V. In
V
pins. When the reg-
DDCORE
DDMAX
DDCORE
. It does not
DD
/V
CAP
of about
/V
PIC24FJ64GB004 FAMILY
CAP
pin
SS
FIGURE 26-1:
26.2.2
When the voltage regulator is enabled, it takes approxi-
mately 10 s for it to generate output. During this time,
designated as T
applied every time the device resumes operation after
any power-down, including Sleep mode. T
determined by the setting of the PMSLP bit (RCON<8>)
and the WUTSEL Configuration bits (CW3<11:10>).
If the regulator is disabled, a separate Power-up Timer
(PWRT) is automatically enabled. The PWRT adds a
fixed delay of 64 ms nominal delay at device start-up
(POR or BOR only).
Note 1:
Note:
Regulator Disabled (DISVREG tied to V
Regulator Disabled (V
Regulator Enabled (DISVREG tied to V
(10 F typ)
2.5V
2.5V
C
EFC
ON-CHIP REGULATOR AND POR
For
Section 29.0 “Electrical Characteristics”.
(1)
(1)
These are typical operating voltages. Refer
to Section 29.1 “DC Characteristics” for
the full operating ranges of V
V
DDCORE
PM
3.3V
more
3.3V
, code execution is disabled. T
.
(1)
CONNECTIONS FOR THE
ON-CHIP REGULATOR
information
V
DISVREG
V
V
DD
DD
DDCORE
SS
V
DISVREG
V
V
V
DISVREG
V
V
PIC24FJ64GB004
DD
DDCORE
SS
PIC24FJ64GB004
PIC24FJ64GB004
DD
DDCORE
SS
tied to V
/V
/V
/V
DS39940D-page 287
CAP
CAP
DDCORE
CAP
DD
on
and
SS
DD
T
):
):
PM
):
,
PM
PM
see
is
is
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