PIC24FJ64GB002-I/SP Microchip Technology, PIC24FJ64GB002-I/SP Datasheet - Page 253
![IC MCU 16BIT 64KB FLASH 28DIP](/photos/6/59/65908/150-28-dip_sml.jpg)
PIC24FJ64GB002-I/SP
Manufacturer Part Number
PIC24FJ64GB002-I/SP
Description
IC MCU 16BIT 64KB FLASH 28DIP
Manufacturer
Microchip Technology
Series
PIC® XLP™ 24Fr
Datasheets
1.MCP73831T-2DCIOT.pdf
(28 pages)
2.PIC24FJ32GA102-ISP.pdf
(48 pages)
3.PIC24FJ32GB002-ISO.pdf
(352 pages)
4.PIC24FJ32GB002-ISO.pdf
(12 pages)
5.PIC24FJ32GB002-ISO.pdf
(342 pages)
Specifications of PIC24FJ64GB002-I/SP
Program Memory Type
FLASH
Program Memory Size
64KB (22K x 24)
Package / Case
28-DIP (0.300", 7.62mm)
Core Processor
PIC
Core Size
16-Bit
Speed
32MHz
Connectivity
I²C, IrDA, SPI, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
19
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 9x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC24FJ
Core
PIC
Data Bus Width
16 bit
Data Ram Size
8 KB
Interface Type
I2C/IrDA/SPI/UART
Maximum Clock Frequency
32 MHz
Number Of Programmable I/os
19
Number Of Timers
5
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
3rd Party Development Tools
52713-733, 52714-737, 53276-922, EWDSPIC
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DM240001, DM240011
Minimum Operating Temperature
- 40 C
On-chip Adc
9-ch x 10-bit
Controller Family/series
PIC24
Ram Memory Size
8KB
Cpu Speed
32MHz
No. Of Timers
5
Embedded Interface Type
I2C, LIN, SPI, UART, USB
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
- MCP73831T-2DCIOT PDF datasheet
- PIC24FJ32GA102-ISP PDF datasheet #2
- PIC24FJ32GB002-ISO PDF datasheet #3
- PIC24FJ32GB002-ISO PDF datasheet #4
- PIC24FJ32GB002-ISO PDF datasheet #5
- Current page: 253 of 352
- Download datasheet (3Mb)
21.0
FIGURE 21-1:
FIGURE 21-2:
2010 Microchip Technology Inc.
Note:
Note 1: Each XOR stage of the shift engine is programmable. See text for details.
Shift Buffer
Data
32-BIT PROGRAMMABLE
CYCLIC REDUNDANCY CHECK
(CRC) GENERATOR
2: Polynomial length n is determined by ([PLEN<3:0>] + 1).
2 * F
This data sheet summarizes the features
of this group of PIC24F devices. It is not
intended to be a comprehensive reference
source. For more information, refer to the
“PIC24F
Section
Cyclic
(DS39729).
CY
Shift Clock
Redundancy
41.
Family
CRC BLOCK DIAGRAM
CRC SHIFT ENGINE DETAIL
“32-Bit
Bit 0
Reference
Read/Write Bus
Check
CRCWDATH
Programmable
CRCDATH
(4x32, 8x16 or 16x8)
CRC Shift Engine
X(1)
Manual”,
Variable FIFO
(CRC)”
Shift Buffer
(1)
CRCWDATH
0
PIC24FJ64GB004 FAMILY
1
Bit 1
CRCWDATL
CRCDATL
LENDIAN
The programmable CRC generator provides a
hardware-implemented method of quickly generating
checksums for various networking and security
applications. It offers the following features:
• User-programmable CRC polynomial equation,
• Programmable shift direction (little or big-endian)
• Independent data and polynomial lengths
• Configurable Interrupt output
• Data FIFO
A simplified block diagram of the CRC generator is
shown in Figure 21-1. A simple version of the CRC shift
engine is shown in Figure 21-2.
up to 32 bits
X(2)
Shift Complete Event
FIFO Empty Event
(1)
Bit 2
CRCWDATL
CRCISEL
1
0
X(n)
Set CRCIF
(1)
DS39940D-page 253
Bit n
(2)
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