AT89C5122D-PSTUM Atmel, AT89C5122D-PSTUM Datasheet - Page 139

• Manufacturer Part Number: AT89C5122D-PSTUM
• Description: IC 8051 MCU FLASH 32K 64QFN
• Manufacturer: Atmel
• Series: 89Cr

Specifications of AT89C5122D-PSTUM

• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 48MHz
• Connectivity: SmartCard, SPI, UART/USART, USB
• Peripherals: LED, POR, WDT
• Number Of I /o: 46
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 768 x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-QFN
• For Use With: AT89STK-10 - KIT EVAL APPL MASS STORAGEAT89STK-03 - KIT STARTER FOR MCU AT8XC5122/23
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -

4202F–SCR–07/2008
MOSI (from Master)
SCK Cycle Number
MISO (from Slave)
SCK (CPOL = 0)
SCK (CPOL = 1)
MOSI (from Master)
SPEN (internal)
MISO (from Slave)
SCK Cycle Number
SCK (CPOL = 1)
SCK (CPOL = 0)
Capture point
SS (to Slave)
SPEN (internal)
Capture Point
SS (to Slave)
Figure 85. Data Transmission Format (CPHA = 0)
Figure 86. Data Transmission Format (CPHA = 1)
As shown in Figure 85, the first SCK edge is the MSB capture strobe. Therefore the
Slave must begin driving its data before the first SCK edge, and a falling edge on the SS
pin is used to start the transmission. The SS pin must be toggled high and then low
between each byte transmitted (Figure 87).
Figure 87. CPHA/SS Timing
Figure 86 shows an SPI transmission in which CPHA is “1”. In this case, the Master
begins driving its MOSI pin on the first SCK edge. Therefore, the Slave uses the first
SCK edge as a start transmission signal. The SS pin can remain low between transmis-
MISO/MOSI
(CPHA = 0)
(CPHA = 1)
Master SS
Slave SS
Slave SS
MSB
MSB
MSB
1
MSB
1
Byte 1
2
bit6
bit6
2
bit6
bit6
3
bit5
bit5
3
bit5
AT83R5122, AT8xC5122/23
bit5
Byte 2
bit4
bit4
4
bit4
bit4
4
bit3
bit3
5
bit3
5
bit3
Byte 3
6
bit2
bit2
6
bit2
bit2
7
bit1
bit1
7
bit1
bit1
LSB
8
LSB
LSB
8
LSB
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