AT89C5122D-PSTUM Atmel, AT89C5122D-PSTUM Datasheet - Page 66

• Manufacturer Part Number: AT89C5122D-PSTUM
• Description: IC 8051 MCU FLASH 32K 64QFN
• Manufacturer: Atmel
• Series: 89Cr

Specifications of AT89C5122D-PSTUM

• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 48MHz
• Connectivity: SmartCard, SPI, UART/USART, USB
• Peripherals: LED, POR, WDT
• Number Of I /o: 46
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 768 x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-QFN
• For Use With: AT89STK-10 - KIT EVAL APPL MASS STORAGEAT89STK-03 - KIT STARTER FOR MCU AT8XC5122/23
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -

The Guard Time counter is an 9 bit counter It is initialized at 001h at the start of a trans-
mission by the Terminal. It then increments itself at each ETU until it reach the 9 bit
value loaded into the SCGT1[0] concatenated with SCGT0[7:0]. At this time a new Ter-
minal transmission is enabled and the Guard Time Counter stop incrementing. As soon
as a new transmission start, the Guard Time Counter is re-initialized at 1 decimal value.
It should be noted that the value of the Guard Time Counter cannot be red. Reading
SCGT1,0 only gives the minimum time between 2 characters that the Guard Time
Counter will allow.
Care must be taken with the Guard Time Counter which counts the duration between
the leading edges of 2 consecutive characters. This correspond to the character dura-
tion (10 ETU) plus the Guard Time as defined by the ISO and EMV recommendations.
To program Guard Time = 2 : 2 stop bits between 2 characters which is equivalent to the
minimum delay of 12 ETUs between the leading edges of 2 consecutive characters,
SCGT1[0],SCGT0[7:0] should be loaded with the value 12 decimal. See Figure 30
Figure 30. Guard Time.
TRANSMISSION to ICC
CHAR n+1
CHAR n+2
CHAR n+3
>= SCGT
The Block Guard Time counter provides a way to program a minimum time between the
Block Guard Time Counter
leading edge of the start bit of a character received from the ICC and the leading edge of
the start bit of a character sent by the terminal. ISO IEC 7816-3 and EMV recommend a
fixed Block Guard Time of 22 ETUs. The AT8xC5122/23 offer the possibility to extend
this delay up to 512 ETUs.
The Block Guard Time is a 9 bit counter. When the Block Guard Time mode is enabled
(BGTEN=1 in SCSR register) The Block Guard Time counter is initialized at 000h at the
start of each character transmissions from the ICC. It then increments at each ETU until
it reach the 9 bit value loaded into shadow SCGT1,0 registers, or until it is re-initialized
by the start of an new transmission from the ICC. If the Block Guard Time counter
reaches the 9 bit value loaded into shadow SCGT1,0 registers, a transmission by the
TERMINAL is enabled, and the Block Guard Time counter stop incrementing. The Block
Guard Time counter is re-initialized at the start of each TERMINAL transmission.
The SCGT1 SCGT0 shadow registers are loaded with the content of GT[8-0] contained
in the registers SCGT1[0),SCGT0(7:0] with the rising edge of the bit BGTEN in the
SCSR register. See Figure 32.
AT83R5122, AT8xC5122/23
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4202F–SCR–07/2008