AT89C5122D-PSTUM Atmel, AT89C5122D-PSTUM Datasheet - Page 68

IC 8051 MCU FLASH 32K 64QFN

AT89C5122D-PSTUM

Manufacturer Part Number
AT89C5122D-PSTUM
Description
IC 8051 MCU FLASH 32K 64QFN
Manufacturer
Atmel
Series
89Cr
Datasheet

Specifications of AT89C5122D-PSTUM

Core Processor
8051
Core Size
8-Bit
Speed
48MHz
Connectivity
SmartCard, SPI, UART/USART, USB
Peripherals
LED, POR, WDT
Number Of I /o
46
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-QFN
For Use With
AT89STK-10 - KIT EVAL APPL MASS STORAGEAT89STK-03 - KIT STARTER FOR MCU AT8XC5122/23
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Figure 33. Waiting Time Counter
68
AT83R5122, AT8xC5122/23
ETU Counter
WTEN
Write_SCWT2
UART
Start Bit
When the WT counter times out, an interrupt is generated and the SCIB function is
locked: reception and emission are disabled. It can be enabled by resetting the macro or
reloading the counter.
The Waiting Time Counter can be used in T=0 protocol for the Work Waiting Time. It can
be used in T=1 protocol for the Character Waiting Time and for the Block Waiting Time.
See the detailed explanation below.
In the so called manuel mode, the counter is loaded, if WTEN = 0, during the write of
SCWT2 register. The counter is loaded with a 32 bit word built with SCWT3 SCWT2
SCWT1 SCWT0 registers (SCWT0 contain WT[7-0] byte. WTEN is located in the
SCICR register.
When WTEN=1 and in UART mode, the counter is re-loaded at the occurence of a start
bit. This mode will be detailed below in T=0 protocol and T=1 protocol.
In manual mode, the WTEN signal controls the start of the counter (rising edge) and the
stop of the counter (falling edge). After a timeout of the counter, a falling edge on
WTEN, a reload of SCWT2 and a rising edge of WTEN are necessary to start again the
counter and to release the SCIB macro. The reload of SCWT2 transfers all SCWT0,
SCWT1, SCWT2 and SCWT3 registers to the WT counter.
In UART mode there is an automatic load on the start bit detection. This automatic load
is very useful for changing on-the-fly the timeout value since there is a register to hold
the load value. This is the case for T=1 protocol.
In T=0 protocol the maximun interval between the start leading edge of any character
sent by the ICC and the start of the previous character sent by either the ICC or the Ter-
minal is the maximum Work Waiting Time. The Work Waiting Time shall not exceed
960*D*WI ETUs with D and WI parameters are returned by the field TA1 and TC2
respectively in the Answer To Reset (ATR). This is the value the user shall write in the
SCWT0,1,2,3 register. This value will be reloaded in the Waiting Time counter every
start bit.
Load
SCWT3
SCWT2
WT Counter
WT[31:0]
SCWT1
SCWT0
Timeout
4202F–SCR–07/2008

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