AT89C5122D-PSTUM Atmel, AT89C5122D-PSTUM Datasheet - Page 154

• Manufacturer Part Number: AT89C5122D-PSTUM
• Description: IC 8051 MCU FLASH 32K 64QFN
• Manufacturer: Atmel
• Series: 89Cr

Specifications of AT89C5122D-PSTUM

• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 48MHz
• Connectivity: SmartCard, SPI, UART/USART, USB
• Peripherals: LED, POR, WDT
• Number Of I /o: 46
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 768 x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-QFN
• For Use With: AT89STK-10 - KIT EVAL APPL MASS STORAGEAT89STK-03 - KIT STARTER FOR MCU AT8XC5122/23
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -

Power Reduction Mode
Registers
154
AT83R5122, AT8xC5122/23
P5 inputs allow exit from idle and power-down modes as detailed in Section "Power-
Down Mode".
Table 94. Keyboard Flag Register - KBF (9Eh)
Reset Value = 0000 0000b
Number
KBF7
Bit
7
6
5
4
3
2
1
0
7
Mnemonic Description
KBF7
KBF6
KBF5
KBF4
KBF3
KBF2
KBF1
KBF0
KBF6
Bit
6
Keyboard line 7 flag
Set by hardware when the Port line 7 detects a programmed level. It generates a
Keyboard interrupt request if the KBE.7 bit in KBE register is set.
Cleared by hardware after the read of the KBF register.
Keyboard line 6 flag
Set by hardware when the Port line 6 detects a programmed level. It generates a
Keyboard interrupt request if the KBE.6 bit in KBE register is set.
Cleared by hardware after the read of the KBF register.
Keyboard line 5 flag
Set by hardware when the Port line 5 detects a programmed level. It generates a
Keyboard interrupt request if the KBE.5 bit in KBE register is set.
Cleared by hardware after the read of the KBF register.
Keyboard line 4 flag
Set by hardware when the Port line 4 detects a programmed level. It generates a
Keyboard interrupt request if the KBE.4 bit in KBE register is set.
Cleared by hardware after the read of the KBF register.
Keyboard line 3 flag
Set by hardware when the Port line 3 detects a programmed level. It generates a
Keyboard interrupt request if the KBE.3 bit in KBE register is set.
Cleared by hardware after the read of the KBF register.
Keyboard line 2 flag
Set by hardware when the Port line 2 detects a programmed level. It generates a
Keyboard interrupt request if the KBE.2 bit in KBE register is set.
Cleared by hardware after the read of the KBF register.
Keyboard line 1 flag
Set by hardware when the Port line 1 detects a programmed level. It generates a
Keyboard interrupt request if the KBE.1 bit in KBE register is set.
Cleared by hardware after the read of the KBF register.
Keyboard line 0 flag
Set by hardware when the Port line 0 detects a programmed level. It generates a
Keyboard interrupt request if the KBE.0 bit in KBE register is set.
Cleared by hardware after the read of the KBF register.
KBF5
5
KBF4
4
KBF3
3
KBF2
2
KBF1
1
4202F–SCR–07/2008
KBF0
0