PIC16F747-I/ML Microchip Technology, PIC16F747-I/ML Datasheet - Page 49

• Manufacturer Part Number: PIC16F747-I/ML
• Description: IC PIC MCU FLASH 4KX14 44QFN
• Manufacturer: Microchip Technology
• Series: PIC® 16Fr

Specifications of PIC16F747-I/ML

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 36
• Program Memory Size: 7KB (4K x 14)
• Program Memory Type: FLASH
• Ram Size: 368 x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 5.5 V
• Data Converters: A/D 14x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-QFN
• Processor Series: PIC16F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 368 B
• Interface Type: AUSART, CCP, I2C, MSSP, SPI
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 36
• Number Of Timers: 8
• Operating Supply Voltage: 4 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: ICE2000, DM163022
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit
• For Use With: XLT44QFN2 - SOCKET TRAN ICE 44QFN/40DIPAC164322 - MODULE SOCKET MPLAB PM3 28/44QFNI3DBF777 - BOARD DAUGHTER ICEPIC3444-1001 - DEMO BOARD FOR PICMICRO MCU
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

TABLE 4-4:
 2004 Microchip Technology Inc.
LP, XT, HS,
LP, XT, HS,
Note 1:
LP, XT, HS
Current
System
T1OSC,
EC, RC
EC, RC
T1OSC
T1OSC
INTRC,
INTRC
INTRC
Clock
If the new clock source is the INTOSC or INTOSC postscaler, then the IOFS bit will be set 4 ms (approx.)
after the clock change.
FOSC<2:0> = EC
FOSC<2:0> = RC
FOSC<2:0> = LP,
FOSC<2:0> = LP,
FOSC<2:0> = LP,
SCS bits<1:0>
(Due to Reset)
Modified to:
LP, XT, HS
XT or HS
XT or HS
(T1OSC)
CLOCK SWITCHING MODES
(INTRC)
XT, HS
10
01
00
00
00
or
1024 Clocks
1024 Clocks
8 Clocks of
8 Clocks of
8 Clocks of
8 Clocks of
LP, XT, HS
T1OSC
INTRC
Delay
RC
EC
or
+
OSTS
bit
0
0
1
1
1
IOFS
N/A
N/A
N/A
N/A
1
bit
(1)
T1RUN
bit
0
1
0
0
0
LP, XT, HS During the 1024 clocks,
LP, XT, HS When a Reset occurs, there is
Postscaler
INTOSC
INTOSC
System
T1OSC
INTRC
Clock
New
EC
RC
or
or
or
The internal RC oscillator
frequency is dependant upon
the IRCF bits.
T1OSCEN bit must be enabled.
program execution is clocked
from the secondary oscillator
until the primary oscillator
becomes stable.
no clock transition sequence.
Instruction
execution and/or peripheral
operation is suspended unless
Two-Speed Start-up mode is
enabled, after which the INTRC
will act as the system clock
until the Oscillator Start-up
Timer has expired.
PIC16F7X7
Comments
DS30498C-page 47