PIC16F747-I/ML Microchip Technology, PIC16F747-I/ML Datasheet - Page 99

IC PIC MCU FLASH 4KX14 44QFN

PIC16F747-I/ML

Manufacturer Part Number
PIC16F747-I/ML
Description
IC PIC MCU FLASH 4KX14 44QFN
Manufacturer
Microchip Technology
Series
PIC® 16Fr

Specifications of PIC16F747-I/ML

Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
36
Program Memory Size
7KB (4K x 14)
Program Memory Type
FLASH
Ram Size
368 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 14x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-QFN
Processor Series
PIC16F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
368 B
Interface Type
AUSART, CCP, I2C, MSSP, SPI
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
36
Number Of Timers
8
Operating Supply Voltage
4 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
ICE2000, DM163022
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit
For Use With
XLT44QFN2 - SOCKET TRAN ICE 44QFN/40DIPAC164322 - MODULE SOCKET MPLAB PM3 28/44QFNI3DBF777 - BOARD DAUGHTER ICEPIC3444-1001 - DEMO BOARD FOR PICMICRO MCU
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC16F747-I/ML
Manufacturer:
MICRON
Quantity:
1 001
10.3.3
To enable the serial port, SSP Enable bit, SSPEN
(SSPCON<5>), must be set. To reset or reconfigure
SPI mode, clear the SSPEN bit, reinitialize the
SSPCON registers and then set the SSPEN bit. This
configures the SDI, SDO, SCK and SS pins as serial
port pins. For the pins to behave as the serial port
function, some must have their data direction bits (in
the TRIS register) appropriately programmed. That is:
• SDI is automatically controlled by the SPI module
• SDO must have TRISC<5> bit cleared
• SCK (Master mode) must have TRISC<3> bit
• SCK (Slave mode) must have TRISC<3> bit set
• SS must have TRISA<5> bit set
Any serial port function that is not desired may be
overridden by programming the corresponding data
direction (TRIS) register to the opposite value.
FIGURE 10-2:
 2004 Microchip Technology Inc.
cleared
SPI™ Master SSPM3:SSPM0 = 00xxb
ENABLING SPI I/O
MSb
PROCESSOR 1
Serial Input Buffer
SPI™ MASTER/SLAVE CONNECTION
Shift Register
(SSPBUF)
(SSPSR)
LSb
SDO
SCK
SDI
Serial Clock
10.3.4
Figure 10-2 shows a typical connection between two
microcontrollers. The master controller (Processor 1)
initiates the data transfer by sending the SCK signal.
Data is shifted out of both shift registers on their pro-
grammed clock edge and latched on the opposite edge
of the clock. Both processors should be programmed to
the same Clock Polarity (CKP), then both controllers
would send and receive data at the same time.
Whether the data is meaningful (or dummy data)
depends on the application software. This leads to
three scenarios for data transmission:
• Master sends data – Slave sends dummy data
• Master sends data – Slave sends data
• Master sends dummy data – Slave sends data
SDO
SCK
SDI
SPI™ Slave SSPM3:SSPM0 = 010xb
TYPICAL CONNECTION
MSb
Serial Input Buffer
Shift Register
PROCESSOR 2
(SSPBUF)
(SSPSR)
PIC16F7X7
LSb
DS30498C-page 97

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