AT89C51RE2-SLSUM Atmel, AT89C51RE2-SLSUM Datasheet - Page 151

MCU 8BIT FLASH 2.7-5.5V 44-PLCC

AT89C51RE2-SLSUM

Manufacturer Part Number
AT89C51RE2-SLSUM
Description
MCU 8BIT FLASH 2.7-5.5V 44-PLCC
Manufacturer
Atmel
Series
89Cr
Datasheet

Specifications of AT89C51RE2-SLSUM

Core Processor
8051
Core Size
8-Bit
Speed
60MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
34
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
44-PLCC
Package
44PLCC
Device Core
8051
Family Name
89C
Maximum Speed
40 MHz
Operating Supply Voltage
3.3|5 V
Data Bus Width
8 Bit
Number Of Programmable I/os
34
Interface Type
SPI/TWI/UART
Number Of Timers
3
Processor Series
AT89x
Core
8051
Data Ram Size
8 KB
Maximum Clock Frequency
40 MHz
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Development Tools By Supplier
AT89OCD-01
Minimum Operating Temperature
- 40 C
Cpu Family
89C
Device Core Size
8b
Frequency (max)
40MHz
Total Internal Ram Size
8KB
# I/os (max)
34
Number Of Timers - General Purpose
3
Operating Supply Voltage (typ)
3.3/5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
2.7V
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
44
Package Type
PLCC
For Use With
AT89OCD-01 - USB EMULATOR FOR AT8XC51 MCUAT89STK-11 - KIT STARTER FOR AT89C51RX2
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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Functional
Description
Figure 57. SPI Module Block Diagram
Operating Modes
7663E–8051–10/08
SPSCR
SPCON
SPIF
SPR2
SPEN
-
Figure 57 shows a detailed structure of the SPI Module.
The Serial Peripheral Interface can be configured in one of the two modes: Master mode or
Slave mode. The configuration and initialization of the SPI Module is made through two
registers:
Once the SPI is configured, the data exchange is made using:
During an SPI transmission, data is simultaneously transmitted (shifted out serially) and
received (shifted in serially). A serial clock line (SCK) synchronizes shifting and sampling on the
two serial data lines (MOSI and MISO). A Slave Select line (SS) allows individual selection of a
Slave SPI device; Slave devices that are not selected do not interfere with SPI bus activities.
OVR
SSDIS
The Serial Peripheral Control register (SPCON)
The Serial Peripheral Status and Control Register (SPSCR)
The Serial Peripheral DATa register (SPDAT)
SPI
Control
MODF
MSTR
Internal Bus
SPTE
CPOL CPHA
UARTM SPTEIE MODFIE
SPR1
SPR0
SPDAT
Transmit Data Register
Receive Data Register
PERIPH
FCLK
7
Clock
Logic
Shift Register
6
5
4
3
SPI Interrupt
Request
2
1
0
AT89C51RE2
M
S
Pin
Control
Logic
8-bit bus
1-bit signal
MOSI
MISO
SCK
SS
151

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