AT89C51RE2-SLSUM Atmel, AT89C51RE2-SLSUM Datasheet - Page 37

MCU 8BIT FLASH 2.7-5.5V 44-PLCC

AT89C51RE2-SLSUM

Manufacturer Part Number
AT89C51RE2-SLSUM
Description
MCU 8BIT FLASH 2.7-5.5V 44-PLCC
Manufacturer
Atmel
Series
89Cr
Datasheet

Specifications of AT89C51RE2-SLSUM

Core Processor
8051
Core Size
8-Bit
Speed
60MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
34
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
44-PLCC
Package
44PLCC
Device Core
8051
Family Name
89C
Maximum Speed
40 MHz
Operating Supply Voltage
3.3|5 V
Data Bus Width
8 Bit
Number Of Programmable I/os
34
Interface Type
SPI/TWI/UART
Number Of Timers
3
Processor Series
AT89x
Core
8051
Data Ram Size
8 KB
Maximum Clock Frequency
40 MHz
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Development Tools By Supplier
AT89OCD-01
Minimum Operating Temperature
- 40 C
Cpu Family
89C
Device Core Size
8b
Frequency (max)
40MHz
Total Internal Ram Size
8KB
# I/os (max)
34
Number Of Timers - General Purpose
3
Operating Supply Voltage (typ)
3.3/5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
2.7V
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
44
Package Type
PLCC
For Use With
AT89OCD-01 - USB EMULATOR FOR AT8XC51 MCUAT89STK-11 - KIT STARTER FOR AT89C51RX2
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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FCON Register
7663E–8051–10/08
Table 23. FCON Register
FCON Register (S:D1h)
Flash Control Register
Reset Value= 0000 0000b
Bit Number
FPL3
7-4
2-0
7
3
Mnemonic
FMOD2:0
FPL3:0
FPL2
FPS
Bit
6
Description
Programming Launch Command Bits
Write 5Xh followed by AXh to launch the programming according to FMOD2:0. (see
Table 26.)
Flash Map Program Space
When this bit is set:
The MOVX @DPTR, A instruction writes in the columns latches space
When this bit is cleared:
The MOVX @DPTR, A instruction writes in the regular XDATA memory space
Flash Mode
These bits allow to select the target memory area and operation on FM0
See Table 25.
FPL1
5
FPL0
4
FPS
3
FMOD2
2
AT89C51RE2
FMOD1
1
FMOD0
0
37

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