LPC2460FBD208,551 NXP Semiconductors, LPC2460FBD208,551 Datasheet - Page 23
LPC2460FBD208,551
Manufacturer Part Number
LPC2460FBD208,551
Description
IC ARM7 MCU ROMLESS 208-LQFP
Manufacturer
NXP Semiconductors
Series
LPC2400r
Specifications of LPC2460FBD208,551
Program Memory Type
ROMless
Package / Case
208-LQFP
Core Processor
ARM7
Core Size
16/32-Bit
Speed
72MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, Microwire, MMC, SPI, SSI, SSP, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
Number Of I /o
160
Ram Size
96K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 1x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
LPC24
Core
ARM7TDMI-S
Data Bus Width
16 bit, 32 bit
Data Ram Size
98 KB
Interface Type
CAN/I2C/I2S/SPI/SSP/UART/USB
Maximum Clock Frequency
72 MHz
Number Of Programmable I/os
160
Number Of Timers
4
Operating Supply Voltage
3.3 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2, MCB2460, MCB2460U
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 10-bit
On-chip Dac
1-ch x 10-bit
Package
208LQFP
Device Core
ARM7TDMI-S
Family Name
LPC2000
Maximum Speed
72 MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
MCB2400U - BOARD EVAL MCB2400 + ULINK2MCB2400 - BOARD EVAL FOR NXP LPC246X SER
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
568-4259
935282455551
LPC2460FBD208-S
935282455551
LPC2460FBD208-S
Available stocks
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Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
LPC2460FBD208,551
Manufacturer:
NXP
Quantity:
180
Company:
Part Number:
LPC2460FBD208,551
Manufacturer:
NXP Semiconductors
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UM10237_4
User manual
5.2 Memory re-mapping
Table 19.
[1]
[2]
In order to allow for compatibility with future derivatives, the entire Boot ROM is mapped
to the top of the on-chip memory space. In this manner, the use of larger or smaller flash
modules will not require changing the location of the Boot ROM (which would require
changing the Boot Loader code itself) or changing the mapping of the Boot ROM interrupt
vectors. Memory spaces other than the interrupt vectors remain in fixed locations.
Figure 2–9
The portion of memory that is re-mapped to allow interrupt processing in different modes
includes the interrupt vector area (32 bytes) and an additional 32 bytes for a total of
64 bytes, that facilitates branching to interrupt handlers at distant physical addresses. The
remapped code locations overlay addresses 0x0000 0000 through 0x0000 003F. A typical
user program in the flash memory can place the entire FIQ handler at address
0x0000 001C without any need to consider memory boundaries. The vector contained in
the SRAM, external memory, and Boot ROM must contain branches to the actual interrupt
handlers, or to other instructions that accomplish the branch to the interrupt handlers.
There are three reasons this configuration was chosen:
Mode
Boot
Loader
mode
User
Flash
mode
User RAM
mode
User
External
memory
mode
1. To give the FIQ handler in the flash memory the advantage of not having to take a
2. Minimize the need to for the SRAM and Boot ROM vectors to deal with arbitrary
3. To provide space to store constants for jumping beyond the range of single word
See EMCControl register address mirror bit in
Connect external boot memory to chip select 1. During boot from external memory, the address mirror bit is
set and memory bank addresses 0 and 1 are swapped.
memory boundary caused by the remapping into account.
boundaries in the middle of code space.
branch instructions.
LPC2400 Memory mapping modes
Activation
Hardware
activation by
any Reset
Software
activation by
Boot code
Software
activation by
User program
Software
activation by
user code
Software
activation by
boot code
shows the on-chip memory mapping in the modes defined above.
Rev. 04 — 26 August 2009
Usage
The Boot Loader always executes after any reset. The Boot ROM
interrupt vectors are mapped to the bottom of memory to allow
handling exceptions and using interrupts during the Boot Loading
process. A sector of the flash memory (the Boot flash) is available to
hold part of the Boot Code.
For LPC2400 parts with flash only. Activated by the Boot Loader when
a valid User Program Signature is recognized in memory and Boot
Loader operation is not forced. Interrupt vectors are not re-mapped
and are found in the bottom of the flash memory.
Activated by a User Program as desired. Interrupt vectors are
re-mapped to the bottom of the Static RAM.
For LPC2400 parts with flash. Interrupt vectors are re-mapped to
external memory bank 0.
For flashless parts LPC2420/60/70 only. Interrupt vectors are
re-mapped to external memory bank 0.
Table 5–68
[1]
Chapter 2: LPC24XX Memory mapping
for address of external memory bank 0.
[2]
UM10237
© NXP B.V. 2009. All rights reserved.
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