LPC2460FBD208,551 NXP Semiconductors, LPC2460FBD208,551 Datasheet - Page 296
LPC2460FBD208,551
Manufacturer Part Number
LPC2460FBD208,551
Description
IC ARM7 MCU ROMLESS 208-LQFP
Manufacturer
NXP Semiconductors
Series
LPC2400r
Specifications of LPC2460FBD208,551
Program Memory Type
ROMless
Package / Case
208-LQFP
Core Processor
ARM7
Core Size
16/32-Bit
Speed
72MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, Microwire, MMC, SPI, SSI, SSP, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
Number Of I /o
160
Ram Size
96K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 1x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
LPC24
Core
ARM7TDMI-S
Data Bus Width
16 bit, 32 bit
Data Ram Size
98 KB
Interface Type
CAN/I2C/I2S/SPI/SSP/UART/USB
Maximum Clock Frequency
72 MHz
Number Of Programmable I/os
160
Number Of Timers
4
Operating Supply Voltage
3.3 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2, MCB2460, MCB2460U
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 10-bit
On-chip Dac
1-ch x 10-bit
Package
208LQFP
Device Core
ARM7TDMI-S
Family Name
LPC2000
Maximum Speed
72 MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
MCB2400U - BOARD EVAL MCB2400 + ULINK2MCB2400 - BOARD EVAL FOR NXP LPC246X SER
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
568-4259
935282455551
LPC2460FBD208-S
935282455551
LPC2460FBD208-S
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
LPC2460FBD208,551
Manufacturer:
NXP
Quantity:
180
Company:
Part Number:
LPC2460FBD208,551
Manufacturer:
NXP Semiconductors
Quantity:
10 000
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UM10237_4
User manual
6.5.5 Cursor clipping
With FrameSync inactive, the cursor responds immediately to any change in the
programmed CRSR_XY value. Some transient smearing effects may be visible if the
cursor is moved across the LCD scan line.
With FrameSync active, the cursor only updates its position after a vertical
synchronization has occurred. This provides clean cursor movement, but the cursor
position only updates once a frame.
The CRSR_XY register (see Cursor XY Position register) is programmed with positive
binary values that enable the cursor image to be located anywhere on the visible screen
image. The cursor image is clipped automatically at the screen limits when it extends
beyond the screen image to the right or bottom (see X1,Y1 in
pattern shows the visible portion of the cursor.
Because the CRSR_XY register values are positive integers, to emulate cursor clipping
on the left and top of screen, a Clip Position register, CRSR_CLIP, is provided. This
controls which point of the cursor image is positioned at the CRSR_CLIP coordinate. For
clipping functions on the Y axis, CRSR_XY(X) is zero, and Clip(X) is programmed to
provide the offset into the cursor image (X2 and X3). The equivalent function is provided
to clip on the X axis at the top of the display (Y2).
For cursors that are not clipped at the X=0 or Y=0 lines, program the Clip Position register
X and Y fields with zero to display the cursor correctly. See Clip(X4,Y4) for the effect of
incorrect programming.
Fig 38. Cursor clipping
Clip(X3)
Rev. 04 — 26 August 2009
Clip(X2)
Cursor(X5)
Clip(X4)
Cursor(X1)
Chapter 12: LPC24XX LCD controller
Figure
12–38). The checked
UM10237
© NXP B.V. 2009. All rights reserved.
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