ADUC841BSZ62-5 Analog Devices Inc, ADUC841BSZ62-5 Datasheet - Page 70

• Manufacturer Part Number: ADUC841BSZ62-5
• Description: IC ADC/DAC 12BIT W/MCU 52-MQFP
• Manufacturer: Analog Devices Inc
• Series: MicroConverter® ADuC8xxr

Specifications of ADUC841BSZ62-5

• Core Size: 8-Bit
• Program Memory Size: 62KB (62K x 8)
• Core Processor: 8052
• Speed: 20MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: DMA, PSM, PWM, Temp Sensor, WDT
• Number Of I /o: 32
• Program Memory Type: FLASH
• Ram Size: 2.25K x 8
• Voltage - Supply (vcc/vdd): 4.75 V ~ 5.25 V
• Data Converters: A/D 8x12b, D/A 2x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 52-MQFP, 52-PQFP
• Controller Family/series: (8051) 8052
• No. Of I/o's: 32
• Ram Memory Size: 2.25KB
• Cpu Speed: 20MIPS
• No. Of Timers: 3
• No. Of Pwm Channels: 2
• Embedded Interface Type: UART
• Rohs Compliant: Yes
• Cpu Family: ADuC8xx
• Device Core: 8052
• Device Core Size: 8b
• Frequency (max): 20MHz
• Interface Type: I2C/SPI/UART
• Total Internal Ram Size: 2.25KB
• # I/os (max): 34
• Number Of Timers - General Purpose: 3
• Operating Supply Voltage (typ): 5V
• Operating Supply Voltage (max): 5.25V
• Operating Supply Voltage (min): 4.75V
• On-chip Adc: 8-chx12-bit
• On-chip Dac: 2-chx12-bit
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 52
• Package Type: MQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: EVAL-ADUC841QSZ - KIT DEV FOR ADUC841 QUICK START
• Eeprom Size: -
• Lead Free Status / Rohs Status: Compliant

ADuC841/ADuC842/ADuC843
INTERRUPT SYSTEM
The ADuC841/ADuC842/ADuC843 provide a total of nine
interrupt sources with two priority levels. The control and
configuration of the interrupt system is carried out through
three interrupt-related SFRs:
IE
IP
IEIP2
IE
SFR Address
Power-On Default
Bit Addressable
Table 35. IE SFR Bit Designations
Bit No.
7
6
5
4
3
2
1
0
IP
SFR Address
Power-On Default
Bit Addressable
Table 36. IP SFR Bit Designations
Bit No.
7
6
5
4
3
2
1
0
Name
----
PADC
PT2
PS
PT1
PX1
PT0
PX0
Name
EA
EADC
ET2
ES
ET1
EX1
ET0
EX0
Interrupt Enable Register
Interrupt Priority Register
Secondary Interrupt Enable Register
Interrupt Enable Register
A8H
00H
Yes
Description
Reserved.
Written by the user to select the ADC interrupt priority (1 = High; 0 = Low).
Written by the user to select the Timer 2 interrupt priority (1 = High; 0 = Low).
Written by the user to select the UART serial port interrupt priority (1 = High; 0 = Low).
Written by the user to select the Timer 1 interrupt priority (1 = High; 0 = Low).
Written by the user to select External Interrupt 1 priority (1 = High; 0 = Low).
Written by the user to select the Timer 0 interrupt priority (1 = High; 0 = Low).
Written by the user to select External Interrupt 0 priority (1 = High; 0 = Low).
Description
Set by the user to enable, or cleared to disable all interrupt sources.
Set by the user to enable, or cleared to disable ADC interrupts.
Set by the user to enable, or cleared to disable Timer 2 interrupts.
Set by the user to enable, or cleared to disable UART serial port interrupts.
Set by the user to enable, or cleared to disable 0 Timer 1 interrupts.
Set by the user to enable, or cleared to disable External Interrupt 1.
Set by the user to enable, or cleared to disable Timer 0 interrupts.
Set by the user to enable, or cleared to disable External Interrupt 0 .
Interrupt Priority Register
B8H
00H
Yes
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