ST72F264G1M6 STMicroelectronics, ST72F264G1M6 Datasheet - Page 32

• Manufacturer Part Number: ST72F264G1M6
• Description: IC MCU 8BIT 4K 28 SOIC
• Manufacturer: STMicroelectronics
• Series: ST7r

Specifications of ST72F264G1M6

• Core Processor: ST7
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: I²C, SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 22
• Program Memory Size: 4KB (4K x 8)
• Program Memory Type: FLASH
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 6x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-SOIC (7.5mm Width)
• Processor Series: ST72F2x
• Core: ST7
• Data Bus Width: 8 bit
• Data Ram Size: 256 B
• Interface Type: I2C, SCI, SPI
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 22
• Number Of Timers: 4 bit
• Operating Supply Voltage: 2.7 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: ST7F264-IND/USB, ST72F34X-SK/RAIS, ST7MDT10-DVP3, ST7MDT10-EMU3, STX-RLINK
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 16 bit
• For Use With: 497-6423 - BOARD EVAL BASED ON ST72264G1497-5046 - KIT TOOL FOR ST7/UPSD/STR7 MCU
• Lead Free Status / RoHS Status: Request inventory verification / Request inventory verification
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: 497-2105-5

ST72260Gx, ST72262Gx, ST72264Gx
INTERRUPTS (Cont’d)
Table 5. Interrupt Mapping
Note 1. Configurable by option byte.
Table 6. Nested Interrupts Register Map and Reset Values
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Address
N°
10
11
12
13
0
1
2
3
4
5
6
7
8
9
001Ch
001Dh
001Eh
001Fh
(Hex.)
TIMER A
TIMER B
Source
RESET
Block
TRAP
MCC
AVD
SCI
SPI
ei0
ei1
I
ISPR0
Reset Value
ISPR1
Reset Value
ISPR2
Reset Value
ISPR3
Reset Value
2
C
Register
Label
Reset
Software Interrupt
External Interrupt Port A7..0 (C5..0
External Interrupt Port B7..0 (C5..0
Not used
SPI Peripheral Interrupts
TIMER A Peripheral Interrupts
Time base interrupt
TIMER B Peripheral Interrupts
Auxiliary Voltage Detector interrupt
Not used
Not used
SCI Peripheral Interrupt
Not Used
Not Used
I
2
C Peripheral Interrupt
I1_11
I1_3
I1_7
7
1
1
1
1
AVD
SPI
I
2
C
Description
I0_11
I0_3
I0_7
6
1
1
1
1
I1_10
I1_2
I1_6
5
1
1
1
1
Not Used
TIMERB
1
1
SCI
)
)
I0_10
I0_2
I0_6
4
1
1
1
1
Register
MCCSR
I2CSRx
SPISR
SICSR
SCISR
Label
TASR
TBSR
N/A
I1_13
I1_1
I1_5
I1_9
3
1
1
1
1
Not Used
Not Used
MCC
Priority
Highest
Lowest
Priority
Priority
EI1
Order
I0_13
I0_1
I0_5
I0_9
2
1
1
1
1
HALT
from
Exit
yes
yes
yes
yes
no
no
no
no
no
I1_12
I1_0
I1_4
I1_8
1
1
1
1
1
FFECh-FFEDh
FFFCh-FFFDh
FFEEh-FFEFh
FFEAh-FFEBh
FFFEh-FFFFh
FFFAh-FFFBh
FFE8h-FFE9h
FFE6h-FFE7h
FFE4h-FFE5h
FFE2h-FFE3h
FFE0h-FFE1h
FFF8h-FFF9h
FFF6h-FFF7h
FFF4h-FFF5h
FFF2h-FFF3h
FFF0h-FFF1h
Not Used
Not Used
TIMERA
Address
EI0
Vector
I0_12
I0_0
I0_4
I0_8
0
1
1
1
1