HD64F3687GFPV Renesas Electronics America, HD64F3687GFPV Datasheet - Page 114
![IC H8 MCU FLASH 56K 64LQFP](/photos/12/19/121969/hd64f3687gfpv_sml.jpg)
HD64F3687GFPV
Manufacturer Part Number
HD64F3687GFPV
Description
IC H8 MCU FLASH 56K 64LQFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300H Tinyr
Specifications of HD64F3687GFPV
Core Processor
H8/300H
Core Size
16-Bit
Speed
20MHz
Connectivity
I²C, SCI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
45
Program Memory Size
56KB (56K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
64-LQFP
Package
64LQFP
Family Name
H8
Maximum Speed
20 MHz
Operating Supply Voltage
3.3|5 V
Data Bus Width
16|32 Bit
Number Of Programmable I/os
45
Interface Type
I2C/SCI
On-chip Adc
8-chx10-bit
Number Of Timers
3
For Use With
R0K436079S000BE - KIT DEV FOR H8/36079 W/COMPILER
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
HD64F3687GFPV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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Section 2 Instruction Descriptions
2.2.28 (2) EEPMOV (W)
EEPMOV (MOVe data to EEPROM)
Operation
if R4
else next;
Assembly-Language Format
EEPMOV.W
Operand Size
—
Description
This instruction performs a block memory transfer. It moves data from the memory location
specified in ER5 to the memory location specified in ER6, increments ER5 and ER6, decrements
R4, and repeats these operations until R4 reaches zero. Execution then proceeds to the next
instruction. No interrupts except NMI are detected while the block transfer is in progress. When
the EEPMOV instruction ends, R4 contains 0, and ER5 and ER6 contain the last transfer address
+ 1. The data transfer is performed a byte at a time, with R4 indicating the number of bytes to be
transferred. The word symbol in the assembly-language format designates the size of R4 (allowing
a maximum 65535 bytes to be transferred).
Operand Format and Number of States Required for Execution
Note: n is the initial value of R4. Although n bytes of data are transferred, memory is accessed
Notes
This instruction first reads memory at the addresses indicated by ER5 and ER6, then carries out
the block data transfer.
Rev. 3.00 Dec 13, 2004 page 98 of 258
REJ09B0213-0300
Addressing
Mode
repeat
until R4 = 0
2(n + 1) times, requiring 4(n + 1) states. (n = 0, 1, 2, …, 65535).
0 then
—
EEPMOV.W
@ER5+
R4 – 1
Mnemonic
R4
@ER6+
Operands
1st byte
7
B
Condition Code
H: Previous value remains unchanged.
N: Previous value remains unchanged.
Z: Previous value remains unchanged.
V: Previous value remains unchanged.
C: Previous value remains unchanged.
2nd byte
D
Instruction Format
— —
I
4
UI
— —
H
3rd byte
5
U
9
Block Data Transfer
—
N
4th byte
8
—
Z
F
—
V
States
No. of
8+4n
—
C
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