HD64F3687GFPV Renesas Electronics America, HD64F3687GFPV Datasheet - Page 202

• Manufacturer Part Number: HD64F3687GFPV
• Description: IC H8 MCU FLASH 56K 64LQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300H Tinyr

Specifications of HD64F3687GFPV

• Core Processor: H8/300H
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: I²C, SCI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 45
• Program Memory Size: 56KB (56K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 64-LQFP
• Package: 64LQFP
• Family Name: H8
• Maximum Speed: 20 MHz
• Operating Supply Voltage: 3.3|5 V
• Data Bus Width: 16|32 Bit
• Number Of Programmable I/os: 45
• Interface Type: I2C/SCI
• On-chip Adc: 8-chx10-bit
• Number Of Timers: 3
• For Use With: R0K436079S000BE - KIT DEV FOR H8/36079 W/COMPILER
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Section 2 Instruction Descriptions
2.2.62 TRAPA
TRAPA (TRAP Always)
Operation
PC
CCR
<Vector>
Assembly-Language Format
TRAPA #x:2
Operand Size
—
Description
This instruction pushes the program counter (PC) and condition-code register (CCR) on the stack,
then sets the I bit to 1 and branches to a new address. The new address is the contents of the vector
address corresponding to the specified vector number. The PC value pushed on the stack is the
starting address of the next instruction after the TRAPA instruction.
Operand Format and Number of States Required for Execution
Notes
1. CCR bit 6 is set to 1 when used as an interrupt mask bit, but retains its previous value when
2. The stack and vector structure differ between normal mode and advanced mode.
Rev. 3.00 Dec 13, 2004 page 186 of 258
REJ09B0213-0300
Register direct
Addressing
used as a user bit.
Mode
@–SP
@–SP
#x
0
1
2
3
PC
Mnemonic
TRAPA
#x:2
Operands
H'0010 to H'0011
H'0012 to H'0013
H'0014 to H'0015
H'0016 to H'0017
Normal Mode
1st byte
5
7
Condition Code
I: Always set to 1.
U: See notes.
H: Previous value remains unchanged.
N: Previous value remains unchanged.
Z: Previous value remains unchanged.
V: Previous value remains unchanged.
C: Previous value remains unchanged.
Vector Address
00 IMM
2nd byte
1
I
Instruction Format
UI
*1
0
—
H
H'000020 to H'000023
H'000024 to H'000027
H'000028 to H'00002B
H'00002C to H'00002F
3rd byte
—
Advanced Mode
U
Trap Unconditionally
—
N
—
Z
4th byte
—
V
—
C
States
No. of
14