HD64F3687GFPV Renesas Electronics America, HD64F3687GFPV Datasheet - Page 83

• Manufacturer Part Number: HD64F3687GFPV
• Description: IC H8 MCU FLASH 56K 64LQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300H Tinyr

Specifications of HD64F3687GFPV

• Core Processor: H8/300H
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: I²C, SCI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 45
• Program Memory Size: 56KB (56K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 64-LQFP
• Package: 64LQFP
• Family Name: H8
• Maximum Speed: 20 MHz
• Operating Supply Voltage: 3.3|5 V
• Data Bus Width: 16|32 Bit
• Number Of Programmable I/os: 45
• Interface Type: I2C/SCI
• On-chip Adc: 8-chx10-bit
• Number Of Timers: 3
• For Use With: R0K436079S000BE - KIT DEV FOR H8/36079 W/COMPILER
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

2.2.18 BSR
BSR (Branch to SubRoutine)
Operation
PC
PC + disp
Assembly-Language Format
BSR disp
Operand Size
—
Description
This instruction branches to a subroutine at a specified address. It pushes the program counter
(PC) value onto the stack as a restart address, then adds a specified displacement to the PC value
and branches to the resulting address. The PC value pushed onto the stack is the address of the
instruction following the BSR instruction. The displacement is a signed 8-bit or 16-bit value, so
the possible branching range is –126 to +128 bytes or –32766 to +32768 bytes from the address of
the BSR instruction.
Operand Format and Number of States Required for Execution
Program-counter
relative
Addressing
Mode
@–SP
PC
Mnemonic Operands
BSR
d:8
d:16
1st byte 2nd byte 3rd byte
5
5
C
5
Instruction Format
0
Condition Code
H: Previous value remains unchanged.
N: Previous value remains unchanged.
Z: Previous value remains unchanged.
V: Previous value remains unchanged.
C: Previous value remains unchanged.
disp
0
— —
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Rev. 3.00 Dec 13, 2004 page 67 of 258
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Section 2 Instruction Descriptions
— —
H
disp
4th byte Normal Advanced
U
Branch to Subroutine
—
N
REJ09B0213-0300
—
Z
No. of States
6
8
—
V
—
C
10
8