MC908GP32CPE Freescale Semiconductor, MC908GP32CPE Datasheet - Page 106

• Manufacturer Part Number: MC908GP32CPE
• Description: IC MCU 8MHZ 32K FLASH 40-DIP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC908GP32CPE

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: SCI, SPI
• Peripherals: LVD, POR, PWM
• Number Of I /o: 33
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 40-DIP (0.600", 15.24mm)
• Processor Series: HC08GP
• Core: HC08
• Data Bus Width: 8 bit
• Data Ram Size: 512 B
• Interface Type: SCI, SPI
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 33
• Number Of Timers: 4
• Maximum Operating Temperature: + 85 C
• Mounting Style: Through Hole
• Development Tools By Supplier: FSICEBASE, DEMO908GZ60E, M68CBL05CE, M68EML08GPGTE
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8 bit, 8 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

Keyboard Interrupt (KBI) Module
10.4 Keyboard Operation
Writing to the KBIEx bits in the keyboard interrupt enable register (INTKBIER) independently enables or
disables each KBI pin. Enabling a keyboard interrupt pin also enables its internal pullup device
irrespective of PUEx bits in the input pullup enable register. A low applied to an enabled keyboard
interrupt pin latches a keyboard interrupt request.
The keyboard interrupt latch is set when one or more keyboard interrupt input goes low after all were high.
MODEK in the keyboard status and control register (INTKBSCR) controls the triggering mode of the
keyboard interrupt.
10.4.1 MODEK = 1
If MODEK is set, the keyboard interrupt inputs are both falling edge and low-level sensitive. With MODEK
set, both of the following actions must occur to clear a keyboard interrupt request:
The KBI vector fetch or software clear and the return of all enabled keyboard interrupt pins to a high level
may occur in any order.
Reset clears the keyboard interrupt request and MODEK, clearing the interrupt request even if a keyboard
interrupt input stays low.
10.4.2 MODEK = 0
If MODEK is clear, the keyboard interrupt pin is falling-edge sensitive only. A KBI vector fetch or software
clear immediately clears the KBI latch.
The keyboard flag bit (KEYF) in INTKBSCR can be read to check for pending interrupts. KEYF is not
affected by IMASKK, which makes it useful in applications where polling is preferred.
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If the keyboard interrupt is edge-sensitive only, a falling edge on a keyboard interrupt input does
not latch an interrupt request if another keyboard pin is already low. To prevent losing an interrupt
request on one input because another input remains low, software can disable the latter input while
it is low.
If the keyboard interrupt is falling edge and low-level sensitive, an interrupt request is present as
long as any keyboard interrupt input is low.
Return of all enabled keyboard interrupt inputs to a high level. As long as any enabled keyboard
interrupt pin is low, the keyboard interrupt remains active.
Vector fetch or software clear. A KBI vector fetch generates an interrupt acknowledge signal to
clear the KBI latch. Software generates the interrupt acknowledge signal by writing a 1 to ACKK in
INTKBSCR. ACKK is useful in applications that poll the keyboard interrupt inputs and require
software to clear the KBI latch. Writing to ACKK prior to leaving an interrupt service routine can
also prevent spurious interrupts due to noise. Setting ACKK does not affect subsequent transitions
on the keyboard interrupt inputs. A falling edge that occurs after writing to ACKK latches another
interrupt request. If the keyboard interrupt mask bit, IMASKK, is clear, the CPU loads the program
counter with the KBI vector address.
Setting a keyboard interrupt enable bit (KBIEx) forces the corresponding
keyboard interrupt pin to be an input, overriding the data direction register.
However, the data direction register bit must be a 0 for software to read the
pin.
MC68HC908GP32 Data Sheet, Rev. 10
NOTE
Freescale Semiconductor