MC908GP32CPE Freescale Semiconductor, MC908GP32CPE Datasheet - Page 208

IC MCU 8MHZ 32K FLASH 40-DIP

MC908GP32CPE

Manufacturer Part Number
MC908GP32CPE
Description
IC MCU 8MHZ 32K FLASH 40-DIP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet

Specifications of MC908GP32CPE

Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Connectivity
SCI, SPI
Peripherals
LVD, POR, PWM
Number Of I /o
33
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
40-DIP (0.600", 15.24mm)
Processor Series
HC08GP
Core
HC08
Data Bus Width
8 bit
Data Ram Size
512 B
Interface Type
SCI, SPI
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
33
Number Of Timers
4
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
Development Tools By Supplier
FSICEBASE, DEMO908GZ60E, M68CBL05CE, M68EML08GPGTE
Minimum Operating Temperature
- 40 C
On-chip Adc
8 bit, 8 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

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Manufacturer
Quantity
Price
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MC908GP32CPE
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Timer Interface Module (TIM)
17.8 I/O Signals
Port D shares four of its pins with the TIM. The four TIM channel I/O pins are T1CH0, T1CH1, T2CH0,
and T2CH1 as described in
Each channel I/O pin is programmable independently as an input capture pin or an output compare pin.
T1CH0 and T2CH0 can be configured as buffered output compare or buffered PWM pins.
17.9 I/O Registers
These I/O registers control and monitor operation of the TIM:
17.9.1 TIM Status and Control Register
The TIM status and control register (TSC):
TOF — TIM Overflow Flag Bit
208
This read/write flag is set when the TIM counter reaches the modulo value programmed in the TIM
counter modulo registers. Clear TOF by reading the TIM status and control register when TOF is set
and then writing a logic 0 to TOF. If another TIM overflow occurs before the clearing sequence is
complete, then writing logic 0 to TOF has no effect. Therefore, a TOF interrupt request cannot be lost
due to inadvertent clearing of TOF. Reset clears the TOF bit. Writing a logic 1 to TOF has no effect.
1 = TIM counter has reached modulo value
0 = TIM counter has not reached modulo value
TIM status and control register (TSC)
TIM counter registers (TCNTH:TCNTL)
TIM counter modulo registers (TMODH:TMODL)
TIM channel status and control registers (TSC0, TSC1)
TIM channel registers (TCH0H:TCH0L, TCH1H:TCH1L)
Enables TIM overflow interrupts
Flags TIM overflows
Stops the TIM counter
Resets the TIM counter
Prescales the TIM counter clock
Address: T1SC, $0020 and T2SC, $002B
References to either timer 1 or timer 2 may be made in the following text by
omitting the timer number. For example, TSC may generically refer to both
T1SC AND T2SC.
Reset:
Read:
Write:
Bit 7
TOF
Figure 17-4. TIM Status and Control Register (TSC)
0
0
17.3 Pin Name
= Unimplemented
TOIE
6
0
MC68HC908GP32 Data Sheet, Rev. 10
TSTOP
5
1
Conventions.
NOTE
TRST
4
0
0
3
0
0
PS2
2
0
PS1
1
0
Freescale Semiconductor
Bit 0
PS0
0

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