MC908GP32CPE Freescale Semiconductor, MC908GP32CPE Datasheet - Page 118

• Manufacturer Part Number: MC908GP32CPE
• Description: IC MCU 8MHZ 32K FLASH 40-DIP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC908GP32CPE

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: SCI, SPI
• Peripherals: LVD, POR, PWM
• Number Of I /o: 33
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 40-DIP (0.600", 15.24mm)
• Processor Series: HC08GP
• Core: HC08
• Data Bus Width: 8 bit
• Data Ram Size: 512 B
• Interface Type: SCI, SPI
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 33
• Number Of Timers: 4
• Maximum Operating Temperature: + 85 C
• Mounting Style: Through Hole
• Development Tools By Supplier: FSICEBASE, DEMO908GZ60E, M68CBL05CE, M68EML08GPGTE
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8 bit, 8 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

Input/Output (I/O) Ports
12.2 Port A
Port A is an 8-bit special-function port that shares all eight of its pins with the keyboard interrupt (KBI)
module. Port A also has software configurable pullup devices if configured as an input port.
12.2.1 Port A Data Register
The port A data register (PTA) contains a data latch for each of the eight port A pins.
PTA7–PTA0 — Port A Data Bits
KBD7–KBD0 — Keyboard Inputs
12.2.2 Data Direction Register A
Data direction register A (DDRA) determines whether each port A pin is an input or an output. Writing a
logic 1 to a DDRA bit enables the output buffer for the corresponding port A pin; a logic 0 disables the
output buffer.
DDRA7–DDRA0 — Data Direction Register A Bits
118
These read/write bits are software programmable. Data direction of each port A pin is under the control
of the corresponding bit in data direction register A. Reset has no effect on port A data.
The keyboard interrupt enable bits, KBIE7–KBIE0, in the keyboard interrupt control register (KBICR)
enable the port A pins as external interrupt pins.
These read/write bits control port A data direction. Reset clears DDRA7–DDRA0, configuring all port
A pins as inputs.
1 = Corresponding port A pin configured as output
0 = Corresponding port A pin configured as input
Alternate Function:
Address:
Address:
Avoid glitches on port A pins by writing to the port A data register before
changing data direction register A bits from 0 to 1.
Reset:
Read:
Write:
Reset:
Read:
Write:
DDRA7
$0000
$0004
Bit 7
0
PTA7
KBD7
Bit 7
Figure 12-3. Data Direction Register A (DDRA)
Figure 12-2. Port A Data Register (PTA)
DDRA6
6
0
PTA6
KBD6
MC68HC908GP32 Data Sheet, Rev. 10
6
DDRA5
5
0
PTA5
KBD5
5
NOTE
DDRA4
(see Chapter 10 Keyboard Interrupt (KBI)
4
0
Unaffected by reset
KBD4
PTA4
4
DDRA3
3
0
KBD3
PTA3
3
DDRA2
2
0
KBD2
PTA2
2
DDRA1
1
0
KBD1
PTA1
1
Freescale Semiconductor
DDRA0
Bit 0
0
KBD0
PTA0
Bit 0
Module)