MC56F8367VPYE Freescale Semiconductor, MC56F8367VPYE Datasheet - Page 26

IC DSP 16BIT 60MHZ 160-LQFP

MC56F8367VPYE

Manufacturer Part Number
MC56F8367VPYE
Description
IC DSP 16BIT 60MHZ 160-LQFP
Manufacturer
Freescale Semiconductor
Series
56F8xxxr
Datasheets

Specifications of MC56F8367VPYE

Core Processor
56800
Core Size
16-Bit
Speed
60MHz
Connectivity
CAN, EBI/EMI, SCI, SPI
Peripherals
POR, PWM, Temp Sensor, WDT
Number Of I /o
76
Program Memory Size
544KB (272K x 16)
Program Memory Type
FLASH
Ram Size
18K x 16
Voltage - Supply (vcc/vdd)
2.25 V ~ 3.6 V
Data Converters
A/D 16x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 105°C
Package / Case
160-LQFP
Cpu Family
56F8xxx
Device Core Size
16b
Frequency (max)
60MHz
Interface Type
CAN/SCI/SPI
Total Internal Ram Size
36KB
# I/os (max)
76
Number Of Timers - General Purpose
4
Operating Supply Voltage (typ)
3.3V
Operating Supply Voltage (max)
3.6V
Operating Supply Voltage (min)
3V
On-chip Adc
4(4-chx12-bit)
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 105C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
160
Package Type
LQFP
Data Bus Width
16 bit
Processor Series
MC56F83xx
Core
56800E
Numeric And Arithmetic Format
Fixed-Point
Device Million Instructions Per Second
60 MIPs
Maximum Clock Frequency
60 MHz
Number Of Programmable I/os
76
Data Ram Size
36 KB
Operating Supply Voltage
3.3 V
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Development Tools By Supplier
MC56F8367EVME
Minimum Operating Temperature
- 40 C
Package
160LQFP
Family Name
56F8xxx
Maximum Speed
60 MHz
Number Of Timers
4
For Use With
MC56F8367EVME - EVAL BOARD FOR MC56F83X
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Compliant

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26
Table 2-2 Signal and Package Information for the 160-Pin LQFP and MBGA (Continued)
(CAN2_RX)
(CAN2_TX)
GPIOD0
GPIOD1
Signal
Name
(CS2)
(CS3)
No.
Pin
55
56
Ball No.
P6
L6
Schmitt
Schmitt
Output
Output
Output
Output
Output
Input/
Open
Input/
Type
Drain
Input
56F8367 Technical Data, Rev. 8
enabled
enabled
During
pull-up
pull-up
Reset
State
Input,
Input,
Port D GPIO — This GPIO pin can be individually programmed
as an input or output pin.
Chip Select — CS2 may be programmed within the EMI module
to act as a chip select for specific areas of the external memory
map.
Depending upon the state of the DRV bit in the EMI Bus Control
Register (BCR), CS2 is tri-stated when the external bus is
inactive.
Most designs will want to change the DRV state to DRV = 1
instead of using the default setting.
FlexCAN2 Transmit Data — CAN output.
At reset, this pin is configured as GPIO. This configuration can be
changed by setting bit 0 in the GPIO_D_PER register. Then
change bit 4 in the SIM_GPS register to select the desired
peripheral function.
To deactivate the internal pull-up resistor, clear bit 0 in the
GPIOD_PUR register.
Port D GPIO — This GPIO pin can be individually programmed
as an input or output pin.
Chip Select — CS3 may be programmed within the EMI module
to act as a chip select for specific areas of the external memory
map.
Depending upon the state of the DRV bit in the EMI Bus Control
Register (BCR), CS3 is tri-stated when the external bus is
inactive.
Most designs will want to change the DRV state to DRV = 1 instead
of using the default setting.
FlexCAN2 Receive Data — This is the CAN input. This pin has
an internal pull-up resistor.
At reset, this pin is configured as GPIO. This configuration can be
changed by setting bit 1 in the GPIO_D_PER register. Then
change bit 5 in the SIM_GPS register to select the desired
peripheral function.
To deactivate the internal pull-up resistor, clear bit 1 in the
GPIOD_PUR register.
Signal Description
Freescale Semiconductor
Preliminary

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