MCL908QY2CDTE Freescale Semiconductor, MCL908QY2CDTE Datasheet - Page 128

• Manufacturer Part Number: MCL908QY2CDTE
• Description: IC MCU 8BIT 1.5K FLASH 16-TSSOP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MCL908QY2CDTE

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 2MHz
• Peripherals: LVD, POR, PWM
• Number Of I /o: 13
• Program Memory Size: 1.5KB (1.5K x 8)
• Program Memory Type: FLASH
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 2.4 V ~ 3.6 V
• Data Converters: A/D 4x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 16-TSSOP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Connectivity: -

Timer Interface Module (TIM)
TRST — TIM Reset Bit
PS[2:0] — Prescaler Select Bits
14.9.2 TIM Counter Registers
The two read-only TIM counter registers contain the high and low bytes of the value in the TIM counter.
Reading the high byte (TCNTH) latches the contents of the low byte (TCNTL) into a buffer. Subsequent
reads of TCNTH do not affect the latched TCNTL value until TCNTL is read. Reset clears the TIM counter
registers. Setting the TIM reset bit (TRST) also clears the TIM counter registers.
128
Setting this write-only bit resets the TIM counter and the TIM prescaler. Setting TRST has no effect on
any other registers. Counting resumes from $0000. TRST is cleared automatically after the TIM
counter is reset and always reads as a 0. Reset clears the TRST bit.
These read/write bits select either the PTA2/TCLK pin or one of the seven prescaler outputs as the
input to the TIM counter as
1 = Prescaler and TIM counter cleared
0 = No effect
Setting the TSTOP and TRST bits simultaneously stops the TIM counter at
a value of $0000.
If you read TCNTH during a break interrupt, be sure to unlatch TCNTL by
reading TCNTL before exiting the break interrupt. Otherwise, TCNTL
retains the value latched during the break.
PS2
0
0
0
0
1
1
1
1
Table 14-2
MC68HLC908QY/QT Family Data Sheet, Rev. 3
PS1
0
0
1
1
0
0
1
1
Table 14-2. Prescaler Selection
shows. Reset clears the PS[2:0] bits.
PS0
0
1
0
1
0
1
0
1
NOTE
NOTE
Internal bus clock ÷ 16
Internal bus clock ÷ 32
Internal bus clock ÷ 64
Internal bus clock ÷ 1
Internal bus clock ÷ 2
Internal bus clock ÷ 4
Internal bus clock ÷ 8
TIM Clock Source
PTA2/TCLK
Freescale Semiconductor